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@@ -1446,7 +1446,8 @@ bnx2_test_and_disable_2g5(struct bnx2 *bp)
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static void
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static void
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bnx2_enable_forced_2g5(struct bnx2 *bp)
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bnx2_enable_forced_2g5(struct bnx2 *bp)
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{
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{
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- u32 bmcr;
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+ u32 uninitialized_var(bmcr);
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+ int err;
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if (!(bp->phy_flags & BNX2_PHY_FLAG_2_5G_CAPABLE))
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if (!(bp->phy_flags & BNX2_PHY_FLAG_2_5G_CAPABLE))
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return;
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return;
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@@ -1456,22 +1457,28 @@ bnx2_enable_forced_2g5(struct bnx2 *bp)
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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MII_BNX2_BLK_ADDR_SERDES_DIG);
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MII_BNX2_BLK_ADDR_SERDES_DIG);
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- bnx2_read_phy(bp, MII_BNX2_SERDES_DIG_MISC1, &val);
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- val &= ~MII_BNX2_SD_MISC1_FORCE_MSK;
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- val |= MII_BNX2_SD_MISC1_FORCE | MII_BNX2_SD_MISC1_FORCE_2_5G;
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- bnx2_write_phy(bp, MII_BNX2_SERDES_DIG_MISC1, val);
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+ if (!bnx2_read_phy(bp, MII_BNX2_SERDES_DIG_MISC1, &val)) {
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+ val &= ~MII_BNX2_SD_MISC1_FORCE_MSK;
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+ val |= MII_BNX2_SD_MISC1_FORCE |
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+ MII_BNX2_SD_MISC1_FORCE_2_5G;
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+ bnx2_write_phy(bp, MII_BNX2_SERDES_DIG_MISC1, val);
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+ }
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
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MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
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- bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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+ err = bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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- bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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- bmcr |= BCM5708S_BMCR_FORCE_2500;
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+ err = bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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+ if (!err)
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+ bmcr |= BCM5708S_BMCR_FORCE_2500;
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} else {
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} else {
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return;
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return;
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}
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}
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+ if (err)
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+ return;
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+
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if (bp->autoneg & AUTONEG_SPEED) {
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if (bp->autoneg & AUTONEG_SPEED) {
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bmcr &= ~BMCR_ANENABLE;
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bmcr &= ~BMCR_ANENABLE;
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if (bp->req_duplex == DUPLEX_FULL)
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if (bp->req_duplex == DUPLEX_FULL)
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@@ -1483,7 +1490,8 @@ bnx2_enable_forced_2g5(struct bnx2 *bp)
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static void
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static void
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bnx2_disable_forced_2g5(struct bnx2 *bp)
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bnx2_disable_forced_2g5(struct bnx2 *bp)
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{
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{
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- u32 bmcr;
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+ u32 uninitialized_var(bmcr);
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+ int err;
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if (!(bp->phy_flags & BNX2_PHY_FLAG_2_5G_CAPABLE))
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if (!(bp->phy_flags & BNX2_PHY_FLAG_2_5G_CAPABLE))
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return;
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return;
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@@ -1493,21 +1501,26 @@ bnx2_disable_forced_2g5(struct bnx2 *bp)
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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MII_BNX2_BLK_ADDR_SERDES_DIG);
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MII_BNX2_BLK_ADDR_SERDES_DIG);
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- bnx2_read_phy(bp, MII_BNX2_SERDES_DIG_MISC1, &val);
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- val &= ~MII_BNX2_SD_MISC1_FORCE;
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- bnx2_write_phy(bp, MII_BNX2_SERDES_DIG_MISC1, val);
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+ if (!bnx2_read_phy(bp, MII_BNX2_SERDES_DIG_MISC1, &val)) {
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+ val &= ~MII_BNX2_SD_MISC1_FORCE;
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+ bnx2_write_phy(bp, MII_BNX2_SERDES_DIG_MISC1, val);
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+ }
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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bnx2_write_phy(bp, MII_BNX2_BLK_ADDR,
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MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
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MII_BNX2_BLK_ADDR_COMBO_IEEEB0);
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- bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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+ err = bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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} else if (CHIP_NUM(bp) == CHIP_NUM_5708) {
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- bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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- bmcr &= ~BCM5708S_BMCR_FORCE_2500;
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+ err = bnx2_read_phy(bp, bp->mii_bmcr, &bmcr);
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+ if (!err)
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+ bmcr &= ~BCM5708S_BMCR_FORCE_2500;
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} else {
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} else {
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return;
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return;
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}
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}
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+ if (err)
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+ return;
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+
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if (bp->autoneg & AUTONEG_SPEED)
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if (bp->autoneg & AUTONEG_SPEED)
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bmcr |= BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_ANRESTART;
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bmcr |= BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_ANRESTART;
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bnx2_write_phy(bp, bp->mii_bmcr, bmcr);
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bnx2_write_phy(bp, bp->mii_bmcr, bmcr);
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