|
@@ -252,6 +252,26 @@
|
|
|
ti,hwmods = "kbd";
|
|
|
};
|
|
|
|
|
|
+ mcpdm: mcpdm@40132000 {
|
|
|
+ compatible = "ti,omap4-mcpdm";
|
|
|
+ reg = <0x40132000 0x7f>, /* MPU private access */
|
|
|
+ <0x49032000 0x7f>; /* L3 Interconnect */
|
|
|
+ reg-names = "mpu", "dma";
|
|
|
+ interrupts = <0 112 0x4>;
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,hwmods = "mcpdm";
|
|
|
+ };
|
|
|
+
|
|
|
+ dmic: dmic@4012e000 {
|
|
|
+ compatible = "ti,omap4-dmic";
|
|
|
+ reg = <0x4012e000 0x7f>, /* MPU private access */
|
|
|
+ <0x4902e000 0x7f>; /* L3 Interconnect */
|
|
|
+ reg-names = "mpu", "dma";
|
|
|
+ interrupts = <0 114 0x4>;
|
|
|
+ interrupt-parent = <&gic>;
|
|
|
+ ti,hwmods = "dmic";
|
|
|
+ };
|
|
|
+
|
|
|
mcbsp1: mcbsp@40122000 {
|
|
|
compatible = "ti,omap4-mcbsp";
|
|
|
reg = <0x40122000 0xff>, /* MPU private access */
|