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@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
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/*
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* 480 MHz seems too high to be ssp clock source directly,
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- * so set frac0 to get a 288 MHz ref_io0.
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+ * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
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*/
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val = readl_relaxed(FRAC0);
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- val &= ~(0x3f << BP_FRAC0_IO0FRAC);
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- val |= 30 << BP_FRAC0_IO0FRAC;
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+ val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
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+ val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
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writel_relaxed(val, FRAC0);
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}
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@@ -174,7 +174,7 @@ static struct clk_lookup lcdif_lookups[] = {
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static struct clk_lookup gpmi_lookups[] = {
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{ .dev_id = "imx28-gpmi-nand", },
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- { .dev_id = "8000c000.gpmi", },
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+ { .dev_id = "8000c000.gpmi-nand", },
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};
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static struct clk_lookup fec_lookups[] = {
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@@ -314,6 +314,7 @@ int __init mx28_clocks_init(void)
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clk_register_clkdev(clks[clk32k], NULL, "timrot");
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clk_register_clkdev(clks[enet_out], NULL, "enet_out");
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+ clk_register_clkdev(clks[pwm], NULL, "80064000.pwm");
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clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups));
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clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups));
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clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups));
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