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@@ -128,7 +128,7 @@ static u8 scc_ide_inb(unsigned long port)
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static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
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static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
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{
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{
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- return (u8)in_be32((void *)hwif->dma_status);
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+ return (u8)in_be32((void *)(hwif->dma_base + 4));
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}
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}
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static void scc_ide_insw(unsigned long port, void *addr, u32 count)
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static void scc_ide_insw(unsigned long port, void *addr, u32 count)
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@@ -266,14 +266,14 @@ static void scc_dma_host_set(ide_drive_t *drive, int on)
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{
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{
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ide_hwif_t *hwif = drive->hwif;
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ide_hwif_t *hwif = drive->hwif;
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u8 unit = (drive->select.b.unit & 0x01);
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u8 unit = (drive->select.b.unit & 0x01);
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- u8 dma_stat = scc_ide_inb(hwif->dma_status);
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+ u8 dma_stat = scc_ide_inb(hwif->dma_base + 4);
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if (on)
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if (on)
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dma_stat |= (1 << (5 + unit));
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dma_stat |= (1 << (5 + unit));
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else
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else
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dma_stat &= ~(1 << (5 + unit));
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dma_stat &= ~(1 << (5 + unit));
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- scc_ide_outb(dma_stat, hwif->dma_status);
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+ scc_ide_outb(dma_stat, hwif->dma_base + 4);
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}
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}
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/**
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/**
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@@ -309,13 +309,13 @@ static int scc_dma_setup(ide_drive_t *drive)
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out_be32((void __iomem *)(hwif->dma_base + 8), hwif->dmatable_dma);
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out_be32((void __iomem *)(hwif->dma_base + 8), hwif->dmatable_dma);
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/* specify r/w */
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/* specify r/w */
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- out_be32((void __iomem *)hwif->dma_command, reading);
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+ out_be32((void __iomem *)hwif->dma_base, reading);
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- /* read dma_status for INTR & ERROR flags */
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- dma_stat = in_be32((void __iomem *)hwif->dma_status);
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+ /* read DMA status for INTR & ERROR flags */
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+ dma_stat = in_be32((void __iomem *)(hwif->dma_base + 4));
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/* clear INTR & ERROR flags */
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/* clear INTR & ERROR flags */
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- out_be32((void __iomem *)hwif->dma_status, dma_stat|6);
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+ out_be32((void __iomem *)(hwif->dma_base + 4), dma_stat | 6);
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drive->waiting_for_dma = 1;
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drive->waiting_for_dma = 1;
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return 0;
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return 0;
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}
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}
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@@ -323,10 +323,10 @@ static int scc_dma_setup(ide_drive_t *drive)
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static void scc_dma_start(ide_drive_t *drive)
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static void scc_dma_start(ide_drive_t *drive)
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{
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{
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ide_hwif_t *hwif = drive->hwif;
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ide_hwif_t *hwif = drive->hwif;
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- u8 dma_cmd = scc_ide_inb(hwif->dma_command);
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+ u8 dma_cmd = scc_ide_inb(hwif->dma_base);
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/* start DMA */
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/* start DMA */
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- scc_ide_outb(dma_cmd | 1, hwif->dma_command);
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+ scc_ide_outb(dma_cmd | 1, hwif->dma_base);
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hwif->dma = 1;
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hwif->dma = 1;
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wmb();
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wmb();
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}
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}
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@@ -338,13 +338,13 @@ static int __scc_dma_end(ide_drive_t *drive)
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drive->waiting_for_dma = 0;
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drive->waiting_for_dma = 0;
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/* get DMA command mode */
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/* get DMA command mode */
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- dma_cmd = scc_ide_inb(hwif->dma_command);
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+ dma_cmd = scc_ide_inb(hwif->dma_base);
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/* stop DMA */
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/* stop DMA */
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- scc_ide_outb(dma_cmd & ~1, hwif->dma_command);
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+ scc_ide_outb(dma_cmd & ~1, hwif->dma_base);
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/* get DMA status */
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/* get DMA status */
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- dma_stat = scc_ide_inb(hwif->dma_status);
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+ dma_stat = scc_ide_inb(hwif->dma_base + 4);
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/* clear the INTR & ERROR bits */
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/* clear the INTR & ERROR bits */
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- scc_ide_outb(dma_stat | 6, hwif->dma_status);
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+ scc_ide_outb(dma_stat | 6, hwif->dma_base + 4);
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/* purge DMA mappings */
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/* purge DMA mappings */
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ide_destroy_dmatable(drive);
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ide_destroy_dmatable(drive);
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/* verify good DMA status */
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/* verify good DMA status */
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@@ -364,6 +364,7 @@ static int __scc_dma_end(ide_drive_t *drive)
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static int scc_dma_end(ide_drive_t *drive)
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static int scc_dma_end(ide_drive_t *drive)
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{
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{
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ide_hwif_t *hwif = HWIF(drive);
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ide_hwif_t *hwif = HWIF(drive);
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+ void __iomem *dma_base = (void __iomem *)hwif->dma_base;
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unsigned long intsts_port = hwif->dma_base + 0x014;
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unsigned long intsts_port = hwif->dma_base + 0x014;
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u32 reg;
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u32 reg;
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int dma_stat, data_loss = 0;
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int dma_stat, data_loss = 0;
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@@ -402,7 +403,7 @@ static int scc_dma_end(ide_drive_t *drive)
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printk(KERN_WARNING "%s: SERROR\n", SCC_PATA_NAME);
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printk(KERN_WARNING "%s: SERROR\n", SCC_PATA_NAME);
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out_be32((void __iomem *)intsts_port, INTSTS_SERROR|INTSTS_BMSINT);
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out_be32((void __iomem *)intsts_port, INTSTS_SERROR|INTSTS_BMSINT);
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- out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
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+ out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
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continue;
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continue;
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}
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}
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@@ -417,7 +418,7 @@ static int scc_dma_end(ide_drive_t *drive)
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out_be32((void __iomem *)intsts_port, INTSTS_PRERR|INTSTS_BMSINT);
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out_be32((void __iomem *)intsts_port, INTSTS_PRERR|INTSTS_BMSINT);
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- out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
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+ out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
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continue;
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continue;
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}
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}
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@@ -425,12 +426,12 @@ static int scc_dma_end(ide_drive_t *drive)
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printk(KERN_WARNING "%s: Response Error\n", SCC_PATA_NAME);
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printk(KERN_WARNING "%s: Response Error\n", SCC_PATA_NAME);
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out_be32((void __iomem *)intsts_port, INTSTS_RERR|INTSTS_BMSINT);
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out_be32((void __iomem *)intsts_port, INTSTS_RERR|INTSTS_BMSINT);
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- out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
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+ out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
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continue;
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continue;
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}
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}
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if (reg & INTSTS_ICERR) {
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if (reg & INTSTS_ICERR) {
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- out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
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+ out_be32(dma_base, in_be32(dma_base) & ~QCHCD_IOS_SS);
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printk(KERN_WARNING "%s: Illegal Configuration\n", SCC_PATA_NAME);
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printk(KERN_WARNING "%s: Illegal Configuration\n", SCC_PATA_NAME);
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out_be32((void __iomem *)intsts_port, INTSTS_ICERR|INTSTS_BMSINT);
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out_be32((void __iomem *)intsts_port, INTSTS_ICERR|INTSTS_BMSINT);
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@@ -832,9 +833,6 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
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ports->hwif = hwif;
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ports->hwif = hwif;
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- hwif->dma_command = hwif->dma_base;
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- hwif->dma_status = hwif->dma_base + 0x04;
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-
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/* PTERADD */
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/* PTERADD */
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out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
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out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
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