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@@ -390,7 +390,8 @@ void default_idle(void)
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EXPORT_SYMBOL(default_idle);
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#endif
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-bool set_pm_idle_to_default(void)
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+#ifdef CONFIG_XEN
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+bool xen_set_default_idle(void)
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{
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bool ret = !!x86_idle;
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@@ -398,6 +399,7 @@ bool set_pm_idle_to_default(void)
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return ret;
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}
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+#endif
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void stop_this_cpu(void *dummy)
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{
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local_irq_disable();
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@@ -407,31 +409,8 @@ void stop_this_cpu(void *dummy)
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set_cpu_online(smp_processor_id(), false);
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disable_local_APIC();
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- for (;;) {
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- if (hlt_works(smp_processor_id()))
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- halt();
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- }
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-}
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-
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-/* Default MONITOR/MWAIT with no hints, used for default C1 state */
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-static void mwait_idle(void)
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-{
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- if (!need_resched()) {
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- trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
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- trace_cpu_idle_rcuidle(1, smp_processor_id());
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- if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
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- clflush((void *)¤t_thread_info()->flags);
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-
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- __monitor((void *)¤t_thread_info()->flags, 0, 0);
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- smp_mb();
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- if (!need_resched())
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- __sti_mwait(0, 0);
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- else
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- local_irq_enable();
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- trace_power_end_rcuidle(smp_processor_id());
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- trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
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- } else
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- local_irq_enable();
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+ for (;;)
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+ halt();
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}
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/*
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@@ -450,53 +429,6 @@ static void poll_idle(void)
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trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
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}
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-/*
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- * mwait selection logic:
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- *
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- * It depends on the CPU. For AMD CPUs that support MWAIT this is
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- * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
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- * then depend on a clock divisor and current Pstate of the core. If
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- * all cores of a processor are in halt state (C1) the processor can
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- * enter the C1E (C1 enhanced) state. If mwait is used this will never
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- * happen.
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- *
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- * idle=mwait overrides this decision and forces the usage of mwait.
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- */
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-
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-#define MWAIT_INFO 0x05
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-#define MWAIT_ECX_EXTENDED_INFO 0x01
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-#define MWAIT_EDX_C1 0xf0
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-
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-int mwait_usable(const struct cpuinfo_x86 *c)
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-{
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- u32 eax, ebx, ecx, edx;
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-
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- /* Use mwait if idle=mwait boot option is given */
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- if (boot_option_idle_override == IDLE_FORCE_MWAIT)
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- return 1;
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-
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- /*
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- * Any idle= boot option other than idle=mwait means that we must not
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- * use mwait. Eg: idle=halt or idle=poll or idle=nomwait
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- */
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- if (boot_option_idle_override != IDLE_NO_OVERRIDE)
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- return 0;
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-
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- if (c->cpuid_level < MWAIT_INFO)
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- return 0;
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-
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- cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
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- /* Check, whether EDX has extended info about MWAIT */
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- if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
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- return 1;
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-
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- /*
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- * edx enumeratios MONITOR/MWAIT extensions. Check, whether
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- * C1 supports MWAIT
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- */
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- return (edx & MWAIT_EDX_C1);
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-}
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-
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bool amd_e400_c1e_detected;
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EXPORT_SYMBOL(amd_e400_c1e_detected);
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@@ -567,13 +499,7 @@ void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
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if (x86_idle)
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return;
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- if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
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- /*
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- * One CPU supports mwait => All CPUs supports mwait
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- */
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- pr_info("using mwait in idle threads\n");
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- x86_idle = mwait_idle;
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- } else if (cpu_has_amd_erratum(amd_erratum_400)) {
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+ if (cpu_has_amd_erratum(amd_erratum_400)) {
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/* E400: APIC timer interrupt does not wake up CPU from C1e */
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pr_info("using AMD E400 aware idle routine\n");
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x86_idle = amd_e400_idle;
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@@ -597,9 +523,6 @@ static int __init idle_setup(char *str)
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pr_info("using polling idle threads\n");
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x86_idle = poll_idle;
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boot_option_idle_override = IDLE_POLL;
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- } else if (!strcmp(str, "mwait")) {
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- boot_option_idle_override = IDLE_FORCE_MWAIT;
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- WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
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} else if (!strcmp(str, "halt")) {
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/*
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* When the boot option of idle=halt is added, halt is
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