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@@ -1324,11 +1324,14 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
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E1000_WRITE_REG(hw, LEDCTL, led_ctrl);
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E1000_WRITE_REG(hw, LEDCTL, led_ctrl);
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}
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}
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- /* disable lplu d3 during driver init */
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- ret_val = e1000_set_d3_lplu_state(hw, FALSE);
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- if (ret_val) {
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- DEBUGOUT("Error Disabling LPLU D3\n");
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- return ret_val;
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+ /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */
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+ if (hw->phy_type == e1000_phy_igp) {
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+ /* disable lplu d3 during driver init */
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+ ret_val = e1000_set_d3_lplu_state(hw, FALSE);
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+ if (ret_val) {
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+ DEBUGOUT("Error Disabling LPLU D3\n");
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+ return ret_val;
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+ }
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}
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}
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/* disable lplu d0 during driver init */
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/* disable lplu d0 during driver init */
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