|
@@ -113,6 +113,8 @@
|
|
#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */
|
|
#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */
|
|
#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
|
|
#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
|
|
#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */
|
|
#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */
|
|
|
|
+#define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */
|
|
|
|
+#define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */
|
|
|
|
|
|
#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */
|
|
#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */
|
|
|
|
|
|
@@ -126,6 +128,8 @@
|
|
#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */
|
|
#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */
|
|
#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
|
|
#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
|
|
#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */
|
|
#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */
|
|
|
|
+#define AT91SAM9G20_SRAM_BASE 0x002FC000 /* Internal SRAM base address */
|
|
|
|
+#define AT91SAM9G20_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */
|
|
|
|
|
|
#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */
|
|
#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */
|
|
|
|
|