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@@ -4478,6 +4478,10 @@ static void rt2800_init_rfcsr_305x_soc(struct rt2x00_dev *rt2x00dev)
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static void rt2800_init_rfcsr_30xx(struct rt2x00_dev *rt2x00dev)
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{
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+ u8 rfcsr;
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+ u16 eeprom;
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+ u32 reg;
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+
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/* XXX vendor driver do this only for 3070 */
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rt2800_rf_init_calibration(rt2x00dev, 30);
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@@ -4500,6 +4504,36 @@ static void rt2800_init_rfcsr_30xx(struct rt2x00_dev *rt2x00dev)
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rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
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rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
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rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
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+
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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+ rt2800_register_read(rt2x00dev, LDO_CFG0, ®);
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+ rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1);
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+ rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 3);
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+ rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
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+ } else if (rt2x00_rt(rt2x00dev, RT3071) ||
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+ rt2x00_rt(rt2x00dev, RT3090)) {
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+ rt2800_rfcsr_write(rt2x00dev, 31, 0x14);
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+
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+ rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
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+ rt2x00_set_field8(&rfcsr, RFCSR6_R2, 1);
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+ rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
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+
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+ rt2800_register_read(rt2x00dev, LDO_CFG0, ®);
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+ rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1);
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+ if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
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+ rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E)) {
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+ rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
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+ if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
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+ rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 3);
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+ else
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+ rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 0);
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+ }
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+ rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
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+
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+ rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®);
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+ rt2x00_set_field32(®, GPIO_SWITCH_5, 0);
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+ rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg);
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+ }
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}
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static void rt2800_init_rfcsr_3290(struct rt2x00_dev *rt2x00dev)
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@@ -4954,35 +4988,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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return 0;
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}
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- if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
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- rt2800_register_read(rt2x00dev, LDO_CFG0, ®);
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- rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1);
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- rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 3);
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- rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
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- } else if (rt2x00_rt(rt2x00dev, RT3071) ||
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- rt2x00_rt(rt2x00dev, RT3090)) {
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- rt2800_rfcsr_write(rt2x00dev, 31, 0x14);
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-
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- rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
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- rt2x00_set_field8(&rfcsr, RFCSR6_R2, 1);
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- rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
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- rt2800_register_read(rt2x00dev, LDO_CFG0, ®);
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- rt2x00_set_field32(®, LDO_CFG0_BGSEL, 1);
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- if (rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) ||
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- rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E)) {
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- rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
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- if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_DAC_TEST))
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- rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 3);
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- else
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- rt2x00_set_field32(®, LDO_CFG0_LDO_CORE_VLEVEL, 0);
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- }
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- rt2800_register_write(rt2x00dev, LDO_CFG0, reg);
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-
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- rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®);
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- rt2x00_set_field32(®, GPIO_SWITCH_5, 0);
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- rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg);
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- } else if (rt2x00_rt(rt2x00dev, RT3390)) {
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+ if (rt2x00_rt(rt2x00dev, RT3390)) {
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rt2800_register_read(rt2x00dev, GPIO_SWITCH, ®);
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rt2x00_set_field32(®, GPIO_SWITCH_5, 0);
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rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg);
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