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@@ -471,20 +471,19 @@ int wl1271_boot(struct wl1271 *wl)
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{
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int ret = 0;
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u32 tmp, clk, pause;
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- int ref_clock = wl->ref_clock;
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wl1271_boot_hw_version(wl);
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- if (ref_clock == 0 || ref_clock == 2 || ref_clock == 4)
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+ if (wl->ref_clock == 0 || wl->ref_clock == 2 || wl->ref_clock == 4)
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/* ref clk: 19.2/38.4/38.4-XTAL */
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clk = 0x3;
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- else if (ref_clock == 1 || ref_clock == 3)
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+ else if (wl->ref_clock == 1 || wl->ref_clock == 3)
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/* ref clk: 26/52 */
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clk = 0x5;
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else
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return -EINVAL;
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- if (ref_clock != 0) {
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+ if (wl->ref_clock != 0) {
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u16 val;
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/* Set clock type (open drain) */
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val = wl1271_top_reg_read(wl, OCP_REG_CLK_TYPE);
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@@ -529,8 +528,7 @@ int wl1271_boot(struct wl1271 *wl)
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wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);
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- /* 2 */
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- clk |= (ref_clock << 1) << 4;
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+ clk |= (wl->ref_clock << 1) << 4;
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wl1271_write32(wl, DRPW_SCRATCH_START, clk);
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wl1271_set_partition(wl, &part_table[PART_WORK]);
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