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@@ -174,6 +174,7 @@ struct fw_ohci {
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unsigned int pri_req_max;
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unsigned int pri_req_max;
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u32 bus_time;
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u32 bus_time;
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bool is_root;
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bool is_root;
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+ bool csr_state_setclear_abdicate;
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/*
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/*
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* Spinlock for accessing fw_ohci data. Never call out of
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* Spinlock for accessing fw_ohci data. Never call out of
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@@ -1529,7 +1530,9 @@ static void bus_reset_tasklet(unsigned long data)
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self_id_count, ohci->self_id_buffer);
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self_id_count, ohci->self_id_buffer);
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fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
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fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation,
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- self_id_count, ohci->self_id_buffer);
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+ self_id_count, ohci->self_id_buffer,
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+ ohci->csr_state_setclear_abdicate);
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+ ohci->csr_state_setclear_abdicate = false;
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}
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}
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static irqreturn_t irq_handler(int irq, void *data)
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static irqreturn_t irq_handler(int irq, void *data)
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@@ -2032,13 +2035,16 @@ static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
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switch (csr_offset) {
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switch (csr_offset) {
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case CSR_STATE_CLEAR:
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case CSR_STATE_CLEAR:
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case CSR_STATE_SET:
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case CSR_STATE_SET:
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- /* the controller driver handles only the cmstr bit */
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if (ohci->is_root &&
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if (ohci->is_root &&
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(reg_read(ohci, OHCI1394_LinkControlSet) &
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(reg_read(ohci, OHCI1394_LinkControlSet) &
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OHCI1394_LinkControl_cycleMaster))
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OHCI1394_LinkControl_cycleMaster))
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- return CSR_STATE_BIT_CMSTR;
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+ value = CSR_STATE_BIT_CMSTR;
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else
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else
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- return 0;
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+ value = 0;
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+ if (ohci->csr_state_setclear_abdicate)
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+ value |= CSR_STATE_BIT_ABDICATE;
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+
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+ return value;
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case CSR_NODE_IDS:
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case CSR_NODE_IDS:
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return reg_read(ohci, OHCI1394_NodeID) << 16;
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return reg_read(ohci, OHCI1394_NodeID) << 16;
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@@ -2078,12 +2084,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
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switch (csr_offset) {
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switch (csr_offset) {
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case CSR_STATE_CLEAR:
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case CSR_STATE_CLEAR:
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- /* the controller driver handles only the cmstr bit */
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if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) {
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if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) {
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reg_write(ohci, OHCI1394_LinkControlClear,
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reg_write(ohci, OHCI1394_LinkControlClear,
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OHCI1394_LinkControl_cycleMaster);
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OHCI1394_LinkControl_cycleMaster);
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flush_writes(ohci);
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flush_writes(ohci);
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}
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}
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+ if (value & CSR_STATE_BIT_ABDICATE)
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+ ohci->csr_state_setclear_abdicate = false;
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break;
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break;
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case CSR_STATE_SET:
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case CSR_STATE_SET:
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@@ -2092,6 +2099,8 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
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OHCI1394_LinkControl_cycleMaster);
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OHCI1394_LinkControl_cycleMaster);
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flush_writes(ohci);
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flush_writes(ohci);
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}
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}
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+ if (value & CSR_STATE_BIT_ABDICATE)
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+ ohci->csr_state_setclear_abdicate = true;
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break;
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break;
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case CSR_NODE_IDS:
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case CSR_NODE_IDS:
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