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@@ -160,13 +160,6 @@ static inline void * isa_bus_to_virt(unsigned long address)
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#define virt_to_bus virt_to_phys
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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#define bus_to_virt phys_to_virt
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-/*
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- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
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- * for the processor. This implies the assumption that there is only
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- * one of these busses.
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- */
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-extern unsigned long isa_slot_offset;
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-
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/*
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/*
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* Change "struct page" to physical address.
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* Change "struct page" to physical address.
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*/
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*/
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@@ -527,16 +520,6 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
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memcpy((void __force *) dst, src, count);
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memcpy((void __force *) dst, src, count);
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}
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}
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-/*
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- * ISA space is 'always mapped' on currently supported MIPS systems, no need
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- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
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- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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- * are physical addresses. The following constant pointer can be
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- * used as the IO-area pointer (it can be iounmapped as well, so the
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- * analogy with PCI is quite large):
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- */
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-#define __ISA_IO_base ((char *)(isa_slot_offset))
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-
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/*
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/*
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* The caches on some architectures aren't dma-coherent and have need to
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* The caches on some architectures aren't dma-coherent and have need to
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* handle this in software. There are three types of operations that
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* handle this in software. There are three types of operations that
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