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@@ -68,37 +68,36 @@ mpc86xx_hpcn_init_irq(void)
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{
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struct mpic *mpic1;
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struct device_node *np;
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- phys_addr_t openpic_paddr;
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+ struct resource res;
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#ifdef CONFIG_PCI
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struct device_node *cascade_node = NULL;
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int cascade_irq;
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#endif
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+ /* Determine PIC address. */
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np = of_find_node_by_type(NULL, "open-pic");
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if (np == NULL)
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return;
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-
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- /* Determine the Physical Address of the OpenPIC regs */
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- openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
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+ of_address_to_resource(np, 0, &res);
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/* Alloc mpic structure and per isu has 16 INT entries. */
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- mpic1 = mpic_alloc(np, openpic_paddr,
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+ mpic1 = mpic_alloc(np, res.start,
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MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
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16, NR_IRQS - 4,
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" MPIC ");
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BUG_ON(mpic1 == NULL);
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- mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000);
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+ mpic_assign_isu(mpic1, 0, res.start + 0x10000);
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/* 48 Internal Interrupts */
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- mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200);
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- mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400);
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- mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600);
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+ mpic_assign_isu(mpic1, 1, res.start + 0x10200);
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+ mpic_assign_isu(mpic1, 2, res.start + 0x10400);
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+ mpic_assign_isu(mpic1, 3, res.start + 0x10600);
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/* 16 External interrupts
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* Moving them from [0 - 15] to [64 - 79]
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*/
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- mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000);
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+ mpic_assign_isu(mpic1, 4, res.start + 0x10000);
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mpic_init(mpic1);
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