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@@ -102,8 +102,8 @@
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#define RTL_PCI_8191CE_DID 0x8177 /*8192ce */
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#define RTL_PCI_8188CE_DID 0x8176 /*8192ce */
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#define RTL_PCI_8192CU_DID 0x8191 /*8192ce */
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-#define RTL_PCI_8192DE_DID 0x092D /*8192ce */
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-#define RTL_PCI_8192DU_DID 0x092D /*8192ce */
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+#define RTL_PCI_8192DE_DID 0x8193 /*8192de */
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+#define RTL_PCI_8192DE_DID2 0x002B /*92DE*/
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/*8192 support 16 pages of IO registers*/
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#define RTL_MEM_MAPPED_IO_RANGE_8190PCI 0x1000
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@@ -129,6 +129,11 @@ enum pci_bridge_vendor {
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PCI_BRIDGE_VENDOR_MAX,
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};
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+struct rtl_pci_capabilities_header {
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+ u8 capability_id;
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+ u8 next;
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+};
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+
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struct rtl_rx_desc {
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u32 dword[8];
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} __packed;
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@@ -161,7 +166,9 @@ struct rtl_pci {
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bool driver_is_goingto_unload;
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bool up_first_time;
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+ bool first_init;
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bool being_init_adapter;
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+ bool init_ready;
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bool irq_enabled;
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/*Tx */
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@@ -197,6 +204,9 @@ struct rtl_pci {
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/*QOS & EDCA */
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enum acm_method acm_method;
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+
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+ u16 shortretry_limit;
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+ u16 longretry_limit;
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};
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struct mp_adapter {
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@@ -227,6 +237,7 @@ struct rtl_pci_priv {
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struct rtl_pci dev;
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struct mp_adapter ndis_adapter;
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struct rtl_led_ctl ledctl;
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+ struct bt_coexist_info bt_coexist;
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};
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#define rtl_pcipriv(hw) (((struct rtl_pci_priv *)(rtl_priv(hw))->priv))
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