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@@ -43,8 +43,8 @@
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#define WL18XX_RX_CHECKSUM_MASK 0x40
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-static char *ht_mode_param = "default";
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-static char *board_type_param = "hdk";
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+static char *ht_mode_param = NULL;
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+static char *board_type_param = NULL;
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static bool checksum_param = false;
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static bool enable_11a_param = true;
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static int num_rx_desc_param = -1;
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@@ -494,16 +494,20 @@ static struct wlcore_conf wl18xx_conf = {
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};
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static struct wl18xx_priv_conf wl18xx_default_priv_conf = {
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+ .ht = {
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+ .mode = HT_MODE_DEFAULT,
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+ },
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.phy = {
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.phy_standalone = 0x00,
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.primary_clock_setting_time = 0x05,
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.clock_valid_on_wake_up = 0x00,
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.secondary_clock_setting_time = 0x05,
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+ .board_type = BOARD_TYPE_HDK_18XX,
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.rdl = 0x01,
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.auto_detect = 0x00,
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.dedicated_fem = FEM_NONE,
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.low_band_component = COMPONENT_2_WAY_SWITCH,
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- .low_band_component_type = 0x05,
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+ .low_band_component_type = 0x06,
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.high_band_component = COMPONENT_2_WAY_SWITCH,
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.high_band_component_type = 0x09,
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.tcxo_ldo_voltage = 0x00,
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@@ -1391,27 +1395,44 @@ static int __devinit wl18xx_probe(struct platform_device *pdev)
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if (ret < 0)
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goto out_free;
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- if (!strcmp(board_type_param, "fpga")) {
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- priv->conf.phy.board_type = BOARD_TYPE_FPGA_18XX;
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- } else if (!strcmp(board_type_param, "hdk")) {
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- priv->conf.phy.board_type = BOARD_TYPE_HDK_18XX;
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- /* HACK! Just for now we hardcode HDK to 0x06 */
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- priv->conf.phy.low_band_component_type = 0x06;
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- } else if (!strcmp(board_type_param, "dvp")) {
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- priv->conf.phy.board_type = BOARD_TYPE_DVP_18XX;
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- } else if (!strcmp(board_type_param, "evb")) {
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- priv->conf.phy.board_type = BOARD_TYPE_EVB_18XX;
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- } else if (!strcmp(board_type_param, "com8")) {
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- priv->conf.phy.board_type = BOARD_TYPE_COM8_18XX;
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- /* HACK! Just for now we hardcode COM8 to 0x06 */
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+ /* If the module param is set, update it in conf */
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+ if (board_type_param) {
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+ if (!strcmp(board_type_param, "fpga")) {
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+ priv->conf.phy.board_type = BOARD_TYPE_FPGA_18XX;
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+ } else if (!strcmp(board_type_param, "hdk")) {
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+ priv->conf.phy.board_type = BOARD_TYPE_HDK_18XX;
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+ } else if (!strcmp(board_type_param, "dvp")) {
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+ priv->conf.phy.board_type = BOARD_TYPE_DVP_18XX;
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+ } else if (!strcmp(board_type_param, "evb")) {
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+ priv->conf.phy.board_type = BOARD_TYPE_EVB_18XX;
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+ } else if (!strcmp(board_type_param, "com8")) {
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+ priv->conf.phy.board_type = BOARD_TYPE_COM8_18XX;
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+ } else {
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+ wl1271_error("invalid board type '%s'",
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+ board_type_param);
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+ ret = -EINVAL;
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+ goto out_free;
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+ }
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+ }
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+
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+ /* HACK! Just for now we hardcode COM8 and HDK to 0x06 */
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+ switch (priv->conf.phy.board_type) {
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+ case BOARD_TYPE_HDK_18XX:
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+ case BOARD_TYPE_COM8_18XX:
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priv->conf.phy.low_band_component_type = 0x06;
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- } else {
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- wl1271_error("invalid board type '%s'", board_type_param);
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+ break;
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+ case BOARD_TYPE_FPGA_18XX:
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+ case BOARD_TYPE_DVP_18XX:
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+ case BOARD_TYPE_EVB_18XX:
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+ priv->conf.phy.low_band_component_type = 0x05;
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+ break;
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+ default:
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+ wl1271_error("invalid board type '%d'",
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+ priv->conf.phy.board_type);
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ret = -EINVAL;
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goto out_free;
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}
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- /* If the module param is set, update it in conf */
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if (low_band_component_param != -1)
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priv->conf.phy.low_band_component = low_band_component_param;
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if (low_band_component_type_param != -1)
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@@ -1432,7 +1453,21 @@ static int __devinit wl18xx_probe(struct platform_device *pdev)
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if (dc2dc_param != -1)
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priv->conf.phy.external_pa_dc2dc = dc2dc_param;
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- if (!strcmp(ht_mode_param, "default")) {
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+ if (ht_mode_param) {
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+ if (!strcmp(ht_mode_param, "default"))
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+ priv->conf.ht.mode = HT_MODE_DEFAULT;
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+ else if (!strcmp(ht_mode_param, "wide"))
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+ priv->conf.ht.mode = HT_MODE_WIDE;
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+ else if (!strcmp(ht_mode_param, "siso20"))
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+ priv->conf.ht.mode = HT_MODE_SISO20;
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+ else {
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+ wl1271_error("invalid ht_mode '%s'", ht_mode_param);
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+ ret = -EINVAL;
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+ goto out_free;
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+ }
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+ }
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+
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+ if (priv->conf.ht.mode == HT_MODE_DEFAULT) {
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/*
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* Only support mimo with multiple antennas. Fall back to
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* siso20.
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@@ -1447,20 +1482,16 @@ static int __devinit wl18xx_probe(struct platform_device *pdev)
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/* 5Ghz is always wide */
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wlcore_set_ht_cap(wl, IEEE80211_BAND_5GHZ,
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&wl18xx_siso40_ht_cap_5ghz);
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- } else if (!strcmp(ht_mode_param, "wide")) {
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+ } else if (priv->conf.ht.mode == HT_MODE_WIDE) {
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wlcore_set_ht_cap(wl, IEEE80211_BAND_2GHZ,
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&wl18xx_siso40_ht_cap_2ghz);
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wlcore_set_ht_cap(wl, IEEE80211_BAND_5GHZ,
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&wl18xx_siso40_ht_cap_5ghz);
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- } else if (!strcmp(ht_mode_param, "siso20")) {
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+ } else if (priv->conf.ht.mode == HT_MODE_SISO20) {
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wlcore_set_ht_cap(wl, IEEE80211_BAND_2GHZ,
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&wl18xx_siso20_ht_cap);
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wlcore_set_ht_cap(wl, IEEE80211_BAND_5GHZ,
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&wl18xx_siso20_ht_cap);
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- } else {
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- wl1271_error("invalid ht_mode '%s'", ht_mode_param);
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- ret = -EINVAL;
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- goto out_free;
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}
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if (!checksum_param) {
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