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@@ -28,192 +28,102 @@ static int hv7131r_init(struct sn9c102_device* cam)
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switch (sn9c102_get_bridge(cam)) {
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case BRIDGE_SN9C103:
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- err += sn9c102_write_reg(cam, 0x00, 0x03);
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- err += sn9c102_write_reg(cam, 0x1a, 0x04);
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- err += sn9c102_write_reg(cam, 0x20, 0x05);
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- err += sn9c102_write_reg(cam, 0x20, 0x06);
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- err += sn9c102_write_reg(cam, 0x03, 0x10);
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- err += sn9c102_write_reg(cam, 0x00, 0x14);
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- err += sn9c102_write_reg(cam, 0x60, 0x17);
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- err += sn9c102_write_reg(cam, 0x0a, 0x18);
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- err += sn9c102_write_reg(cam, 0xf0, 0x19);
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- err += sn9c102_write_reg(cam, 0x1d, 0x1a);
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- err += sn9c102_write_reg(cam, 0x10, 0x1b);
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- err += sn9c102_write_reg(cam, 0x02, 0x1c);
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- err += sn9c102_write_reg(cam, 0x03, 0x1d);
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- err += sn9c102_write_reg(cam, 0x0f, 0x1e);
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- err += sn9c102_write_reg(cam, 0x0c, 0x1f);
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- err += sn9c102_write_reg(cam, 0x00, 0x20);
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- err += sn9c102_write_reg(cam, 0x10, 0x21);
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- err += sn9c102_write_reg(cam, 0x20, 0x22);
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- err += sn9c102_write_reg(cam, 0x30, 0x23);
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- err += sn9c102_write_reg(cam, 0x40, 0x24);
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- err += sn9c102_write_reg(cam, 0x50, 0x25);
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- err += sn9c102_write_reg(cam, 0x60, 0x26);
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- err += sn9c102_write_reg(cam, 0x70, 0x27);
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- err += sn9c102_write_reg(cam, 0x80, 0x28);
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- err += sn9c102_write_reg(cam, 0x90, 0x29);
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- err += sn9c102_write_reg(cam, 0xa0, 0x2a);
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- err += sn9c102_write_reg(cam, 0xb0, 0x2b);
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- err += sn9c102_write_reg(cam, 0xc0, 0x2c);
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- err += sn9c102_write_reg(cam, 0xd0, 0x2d);
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- err += sn9c102_write_reg(cam, 0xe0, 0x2e);
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- err += sn9c102_write_reg(cam, 0xf0, 0x2f);
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- err += sn9c102_write_reg(cam, 0xff, 0x30);
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+ err = sn9c102_write_const_regs(cam, {0x00, 0x03}, {0x1a, 0x04},
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+ {0x20, 0x05}, {0x20, 0x06},
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+ {0x03, 0x10}, {0x00, 0x14},
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+ {0x60, 0x17}, {0x0a, 0x18},
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+ {0xf0, 0x19}, {0x1d, 0x1a},
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+ {0x10, 0x1b}, {0x02, 0x1c},
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+ {0x03, 0x1d}, {0x0f, 0x1e},
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+ {0x0c, 0x1f}, {0x00, 0x20},
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+ {0x10, 0x21}, {0x20, 0x22},
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+ {0x30, 0x23}, {0x40, 0x24},
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+ {0x50, 0x25}, {0x60, 0x26},
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+ {0x70, 0x27}, {0x80, 0x28},
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+ {0x90, 0x29}, {0xa0, 0x2a},
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+ {0xb0, 0x2b}, {0xc0, 0x2c},
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+ {0xd0, 0x2d}, {0xe0, 0x2e},
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+ {0xf0, 0x2f}, {0xff, 0x30});
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+
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break;
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case BRIDGE_SN9C105:
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case BRIDGE_SN9C120:
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- err += sn9c102_write_reg(cam, 0x44, 0x01);
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- err += sn9c102_write_reg(cam, 0x40, 0x02);
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- err += sn9c102_write_reg(cam, 0x00, 0x03);
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- err += sn9c102_write_reg(cam, 0x1a, 0x04);
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- err += sn9c102_write_reg(cam, 0x44, 0x05);
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- err += sn9c102_write_reg(cam, 0x3e, 0x06);
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- err += sn9c102_write_reg(cam, 0x1a, 0x07);
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- err += sn9c102_write_reg(cam, 0x03, 0x10);
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- err += sn9c102_write_reg(cam, 0x08, 0x14);
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- err += sn9c102_write_reg(cam, 0xa3, 0x17);
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- err += sn9c102_write_reg(cam, 0x4b, 0x18);
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- err += sn9c102_write_reg(cam, 0x00, 0x19);
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- err += sn9c102_write_reg(cam, 0x1d, 0x1a);
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- err += sn9c102_write_reg(cam, 0x10, 0x1b);
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- err += sn9c102_write_reg(cam, 0x02, 0x1c);
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- err += sn9c102_write_reg(cam, 0x03, 0x1d);
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- err += sn9c102_write_reg(cam, 0x0f, 0x1e);
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- err += sn9c102_write_reg(cam, 0x0c, 0x1f);
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- err += sn9c102_write_reg(cam, 0x00, 0x20);
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- err += sn9c102_write_reg(cam, 0x29, 0x21);
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- err += sn9c102_write_reg(cam, 0x40, 0x22);
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- err += sn9c102_write_reg(cam, 0x54, 0x23);
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- err += sn9c102_write_reg(cam, 0x66, 0x24);
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- err += sn9c102_write_reg(cam, 0x76, 0x25);
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- err += sn9c102_write_reg(cam, 0x85, 0x26);
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- err += sn9c102_write_reg(cam, 0x94, 0x27);
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- err += sn9c102_write_reg(cam, 0xa1, 0x28);
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- err += sn9c102_write_reg(cam, 0xae, 0x29);
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- err += sn9c102_write_reg(cam, 0xbb, 0x2a);
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- err += sn9c102_write_reg(cam, 0xc7, 0x2b);
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- err += sn9c102_write_reg(cam, 0xd3, 0x2c);
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- err += sn9c102_write_reg(cam, 0xde, 0x2d);
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- err += sn9c102_write_reg(cam, 0xea, 0x2e);
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- err += sn9c102_write_reg(cam, 0xf4, 0x2f);
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- err += sn9c102_write_reg(cam, 0xff, 0x30);
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- err += sn9c102_write_reg(cam, 0x00, 0x3F);
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- err += sn9c102_write_reg(cam, 0xC7, 0x40);
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- err += sn9c102_write_reg(cam, 0x01, 0x41);
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- err += sn9c102_write_reg(cam, 0x44, 0x42);
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- err += sn9c102_write_reg(cam, 0x00, 0x43);
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- err += sn9c102_write_reg(cam, 0x44, 0x44);
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- err += sn9c102_write_reg(cam, 0x00, 0x45);
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- err += sn9c102_write_reg(cam, 0x44, 0x46);
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- err += sn9c102_write_reg(cam, 0x00, 0x47);
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- err += sn9c102_write_reg(cam, 0xC7, 0x48);
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- err += sn9c102_write_reg(cam, 0x01, 0x49);
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- err += sn9c102_write_reg(cam, 0xC7, 0x4A);
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- err += sn9c102_write_reg(cam, 0x01, 0x4B);
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- err += sn9c102_write_reg(cam, 0xC7, 0x4C);
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- err += sn9c102_write_reg(cam, 0x01, 0x4D);
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- err += sn9c102_write_reg(cam, 0x44, 0x4E);
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- err += sn9c102_write_reg(cam, 0x00, 0x4F);
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- err += sn9c102_write_reg(cam, 0x44, 0x50);
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- err += sn9c102_write_reg(cam, 0x00, 0x51);
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- err += sn9c102_write_reg(cam, 0x44, 0x52);
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- err += sn9c102_write_reg(cam, 0x00, 0x53);
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- err += sn9c102_write_reg(cam, 0xC7, 0x54);
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- err += sn9c102_write_reg(cam, 0x01, 0x55);
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- err += sn9c102_write_reg(cam, 0xC7, 0x56);
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- err += sn9c102_write_reg(cam, 0x01, 0x57);
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- err += sn9c102_write_reg(cam, 0xC7, 0x58);
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- err += sn9c102_write_reg(cam, 0x01, 0x59);
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- err += sn9c102_write_reg(cam, 0x44, 0x5A);
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- err += sn9c102_write_reg(cam, 0x00, 0x5B);
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- err += sn9c102_write_reg(cam, 0x44, 0x5C);
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- err += sn9c102_write_reg(cam, 0x00, 0x5D);
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- err += sn9c102_write_reg(cam, 0x44, 0x5E);
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- err += sn9c102_write_reg(cam, 0x00, 0x5F);
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- err += sn9c102_write_reg(cam, 0xC7, 0x60);
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- err += sn9c102_write_reg(cam, 0x01, 0x61);
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- err += sn9c102_write_reg(cam, 0xC7, 0x62);
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- err += sn9c102_write_reg(cam, 0x01, 0x63);
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- err += sn9c102_write_reg(cam, 0xC7, 0x64);
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- err += sn9c102_write_reg(cam, 0x01, 0x65);
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- err += sn9c102_write_reg(cam, 0x44, 0x66);
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- err += sn9c102_write_reg(cam, 0x00, 0x67);
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- err += sn9c102_write_reg(cam, 0x44, 0x68);
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- err += sn9c102_write_reg(cam, 0x00, 0x69);
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- err += sn9c102_write_reg(cam, 0x44, 0x6A);
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- err += sn9c102_write_reg(cam, 0x00, 0x6B);
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- err += sn9c102_write_reg(cam, 0xC7, 0x6C);
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- err += sn9c102_write_reg(cam, 0x01, 0x6D);
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- err += sn9c102_write_reg(cam, 0xC7, 0x6E);
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- err += sn9c102_write_reg(cam, 0x01, 0x6F);
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- err += sn9c102_write_reg(cam, 0xC7, 0x70);
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- err += sn9c102_write_reg(cam, 0x01, 0x71);
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- err += sn9c102_write_reg(cam, 0x44, 0x72);
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- err += sn9c102_write_reg(cam, 0x00, 0x73);
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- err += sn9c102_write_reg(cam, 0x44, 0x74);
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- err += sn9c102_write_reg(cam, 0x00, 0x75);
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- err += sn9c102_write_reg(cam, 0x44, 0x76);
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- err += sn9c102_write_reg(cam, 0x00, 0x77);
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- err += sn9c102_write_reg(cam, 0xC7, 0x78);
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- err += sn9c102_write_reg(cam, 0x01, 0x79);
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- err += sn9c102_write_reg(cam, 0xC7, 0x7A);
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- err += sn9c102_write_reg(cam, 0x01, 0x7B);
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- err += sn9c102_write_reg(cam, 0xC7, 0x7C);
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- err += sn9c102_write_reg(cam, 0x01, 0x7D);
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- err += sn9c102_write_reg(cam, 0x44, 0x7E);
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- err += sn9c102_write_reg(cam, 0x00, 0x7F);
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- err += sn9c102_write_reg(cam, 0x14, 0x84);
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- err += sn9c102_write_reg(cam, 0x00, 0x85);
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- err += sn9c102_write_reg(cam, 0x27, 0x86);
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- err += sn9c102_write_reg(cam, 0x00, 0x87);
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- err += sn9c102_write_reg(cam, 0x07, 0x88);
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- err += sn9c102_write_reg(cam, 0x00, 0x89);
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- err += sn9c102_write_reg(cam, 0xEC, 0x8A);
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- err += sn9c102_write_reg(cam, 0x0f, 0x8B);
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- err += sn9c102_write_reg(cam, 0xD8, 0x8C);
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- err += sn9c102_write_reg(cam, 0x0f, 0x8D);
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- err += sn9c102_write_reg(cam, 0x3D, 0x8E);
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- err += sn9c102_write_reg(cam, 0x00, 0x8F);
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- err += sn9c102_write_reg(cam, 0x3D, 0x90);
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- err += sn9c102_write_reg(cam, 0x00, 0x91);
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- err += sn9c102_write_reg(cam, 0xCD, 0x92);
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- err += sn9c102_write_reg(cam, 0x0f, 0x93);
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- err += sn9c102_write_reg(cam, 0xf7, 0x94);
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- err += sn9c102_write_reg(cam, 0x0f, 0x95);
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- err += sn9c102_write_reg(cam, 0x0C, 0x96);
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- err += sn9c102_write_reg(cam, 0x00, 0x97);
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- err += sn9c102_write_reg(cam, 0x00, 0x98);
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- err += sn9c102_write_reg(cam, 0x66, 0x99);
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- err += sn9c102_write_reg(cam, 0x05, 0x9A);
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- err += sn9c102_write_reg(cam, 0x00, 0x9B);
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- err += sn9c102_write_reg(cam, 0x04, 0x9C);
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- err += sn9c102_write_reg(cam, 0x00, 0x9D);
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- err += sn9c102_write_reg(cam, 0x08, 0x9E);
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- err += sn9c102_write_reg(cam, 0x00, 0x9F);
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- err += sn9c102_write_reg(cam, 0x2D, 0xC0);
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- err += sn9c102_write_reg(cam, 0x2D, 0xC1);
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- err += sn9c102_write_reg(cam, 0x3A, 0xC2);
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- err += sn9c102_write_reg(cam, 0x05, 0xC3);
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- err += sn9c102_write_reg(cam, 0x04, 0xC4);
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- err += sn9c102_write_reg(cam, 0x3F, 0xC5);
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- err += sn9c102_write_reg(cam, 0x00, 0xC6);
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- err += sn9c102_write_reg(cam, 0x00, 0xC7);
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- err += sn9c102_write_reg(cam, 0x50, 0xC8);
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- err += sn9c102_write_reg(cam, 0x3C, 0xC9);
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- err += sn9c102_write_reg(cam, 0x28, 0xCA);
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- err += sn9c102_write_reg(cam, 0xD8, 0xCB);
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- err += sn9c102_write_reg(cam, 0x14, 0xCC);
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- err += sn9c102_write_reg(cam, 0xEC, 0xCD);
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- err += sn9c102_write_reg(cam, 0x32, 0xCE);
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- err += sn9c102_write_reg(cam, 0xDD, 0xCF);
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- err += sn9c102_write_reg(cam, 0x32, 0xD0);
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- err += sn9c102_write_reg(cam, 0xDD, 0xD1);
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- err += sn9c102_write_reg(cam, 0x6A, 0xD2);
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- err += sn9c102_write_reg(cam, 0x50, 0xD3);
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- err += sn9c102_write_reg(cam, 0x00, 0xD4);
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- err += sn9c102_write_reg(cam, 0x00, 0xD5);
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- err += sn9c102_write_reg(cam, 0x00, 0xD6);
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+ err = sn9c102_write_const_regs(cam, {0x44, 0x01}, {0x40, 0x02},
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+ {0x00, 0x03}, {0x1a, 0x04},
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+ {0x44, 0x05}, {0x3e, 0x06},
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+ {0x1a, 0x07}, {0x03, 0x10},
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+ {0x08, 0x14}, {0xa3, 0x17},
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+ {0x4b, 0x18}, {0x00, 0x19},
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+ {0x1d, 0x1a}, {0x10, 0x1b},
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+ {0x02, 0x1c}, {0x03, 0x1d},
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+ {0x0f, 0x1e}, {0x0c, 0x1f},
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+ {0x00, 0x20}, {0x29, 0x21},
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+ {0x40, 0x22}, {0x54, 0x23},
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+ {0x66, 0x24}, {0x76, 0x25},
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+ {0x85, 0x26}, {0x94, 0x27},
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+ {0xa1, 0x28}, {0xae, 0x29},
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+ {0xbb, 0x2a}, {0xc7, 0x2b},
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+ {0xd3, 0x2c}, {0xde, 0x2d},
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+ {0xea, 0x2e}, {0xf4, 0x2f},
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+ {0xff, 0x30}, {0x00, 0x3F},
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+ {0xC7, 0x40}, {0x01, 0x41},
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+ {0x44, 0x42}, {0x00, 0x43},
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+ {0x44, 0x44}, {0x00, 0x45},
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+ {0x44, 0x46}, {0x00, 0x47},
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+ {0xC7, 0x48}, {0x01, 0x49},
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+ {0xC7, 0x4A}, {0x01, 0x4B},
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+ {0xC7, 0x4C}, {0x01, 0x4D},
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+ {0x44, 0x4E}, {0x00, 0x4F},
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+ {0x44, 0x50}, {0x00, 0x51},
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+ {0x44, 0x52}, {0x00, 0x53},
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+ {0xC7, 0x54}, {0x01, 0x55},
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+ {0xC7, 0x56}, {0x01, 0x57},
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+ {0xC7, 0x58}, {0x01, 0x59},
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+ {0x44, 0x5A}, {0x00, 0x5B},
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+ {0x44, 0x5C}, {0x00, 0x5D},
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+ {0x44, 0x5E}, {0x00, 0x5F},
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+ {0xC7, 0x60}, {0x01, 0x61},
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+ {0xC7, 0x62}, {0x01, 0x63},
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+ {0xC7, 0x64}, {0x01, 0x65},
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+ {0x44, 0x66}, {0x00, 0x67},
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+ {0x44, 0x68}, {0x00, 0x69},
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+ {0x44, 0x6A}, {0x00, 0x6B},
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+ {0xC7, 0x6C}, {0x01, 0x6D},
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+ {0xC7, 0x6E}, {0x01, 0x6F},
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+ {0xC7, 0x70}, {0x01, 0x71},
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+ {0x44, 0x72}, {0x00, 0x73},
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+ {0x44, 0x74}, {0x00, 0x75},
|
|
|
+ {0x44, 0x76}, {0x00, 0x77},
|
|
|
+ {0xC7, 0x78}, {0x01, 0x79},
|
|
|
+ {0xC7, 0x7A}, {0x01, 0x7B},
|
|
|
+ {0xC7, 0x7C}, {0x01, 0x7D},
|
|
|
+ {0x44, 0x7E}, {0x00, 0x7F},
|
|
|
+ {0x14, 0x84}, {0x00, 0x85},
|
|
|
+ {0x27, 0x86}, {0x00, 0x87},
|
|
|
+ {0x07, 0x88}, {0x00, 0x89},
|
|
|
+ {0xEC, 0x8A}, {0x0f, 0x8B},
|
|
|
+ {0xD8, 0x8C}, {0x0f, 0x8D},
|
|
|
+ {0x3D, 0x8E}, {0x00, 0x8F},
|
|
|
+ {0x3D, 0x90}, {0x00, 0x91},
|
|
|
+ {0xCD, 0x92}, {0x0f, 0x93},
|
|
|
+ {0xf7, 0x94}, {0x0f, 0x95},
|
|
|
+ {0x0C, 0x96}, {0x00, 0x97},
|
|
|
+ {0x00, 0x98}, {0x66, 0x99},
|
|
|
+ {0x05, 0x9A}, {0x00, 0x9B},
|
|
|
+ {0x04, 0x9C}, {0x00, 0x9D},
|
|
|
+ {0x08, 0x9E}, {0x00, 0x9F},
|
|
|
+ {0x2D, 0xC0}, {0x2D, 0xC1},
|
|
|
+ {0x3A, 0xC2}, {0x05, 0xC3},
|
|
|
+ {0x04, 0xC4}, {0x3F, 0xC5},
|
|
|
+ {0x00, 0xC6}, {0x00, 0xC7},
|
|
|
+ {0x50, 0xC8}, {0x3C, 0xC9},
|
|
|
+ {0x28, 0xCA}, {0xD8, 0xCB},
|
|
|
+ {0x14, 0xCC}, {0xEC, 0xCD},
|
|
|
+ {0x32, 0xCE}, {0xDD, 0xCF},
|
|
|
+ {0x32, 0xD0}, {0xDD, 0xD1},
|
|
|
+ {0x6A, 0xD2}, {0x50, 0xD3},
|
|
|
+ {0x00, 0xD4}, {0x00, 0xD5},
|
|
|
+ {0x00, 0xD6});
|
|
|
break;
|
|
|
default:
|
|
|
break;
|
|
@@ -434,14 +344,12 @@ static struct sn9c102_sensor hv7131r = {
|
|
|
|
|
|
int sn9c102_probe_hv7131r(struct sn9c102_device* cam)
|
|
|
{
|
|
|
- int devid, err = 0;
|
|
|
+ int devid, err;
|
|
|
+
|
|
|
+ err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x44, 0x02},
|
|
|
+ {0x34, 0x01}, {0x20, 0x17},
|
|
|
+ {0x34, 0x01}, {0x46, 0x01});
|
|
|
|
|
|
- err += sn9c102_write_reg(cam, 0x09, 0x01);
|
|
|
- err += sn9c102_write_reg(cam, 0x44, 0x02);
|
|
|
- err += sn9c102_write_reg(cam, 0x34, 0x01);
|
|
|
- err += sn9c102_write_reg(cam, 0x20, 0x17);
|
|
|
- err += sn9c102_write_reg(cam, 0x34, 0x01);
|
|
|
- err += sn9c102_write_reg(cam, 0x46, 0x01);
|
|
|
if (err)
|
|
|
return -EIO;
|
|
|
|