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@@ -52,9 +52,10 @@
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* We layout physical memory as follows:
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* We layout physical memory as follows:
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* 0x0000 - 0x00ff : Secondary processor spin code
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* 0x0000 - 0x00ff : Secondary processor spin code
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* 0x0100 - 0x2fff : pSeries Interrupt prologs
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* 0x0100 - 0x2fff : pSeries Interrupt prologs
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- * 0x3000 - 0x6fff : interrupt support, iSeries and common interrupt prologs
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+ * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
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+ * 0x6000 - 0x6fff : Initial (CPU0) segment table
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* 0x7000 - 0x7fff : FWNMI data area
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* 0x7000 - 0x7fff : FWNMI data area
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- * 0x9000 - 0x9fff : Initial segment table
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+ * 0x8000 - : Early init and support code
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*/
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*/
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/*
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/*
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@@ -1256,6 +1257,20 @@ unrecov_slb:
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bl .unrecoverable_exception
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bl .unrecoverable_exception
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b 1b
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b 1b
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+/*
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+ * Space for CPU0's segment table.
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+ *
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+ * On iSeries, the hypervisor must fill in at least one entry before
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+ * we get control (with relocate on). The address is give to the hv
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+ * as a page number (see xLparMap in LparData.c), so this must be at a
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+ * fixed address (the linker can't compute (u64)&initial_stab >>
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+ * PAGE_SHIFT).
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+ */
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+ . = STAB0_PHYS_ADDR /* 0x6000 */
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+ .globl initial_stab
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+initial_stab:
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+ .space 4096
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+
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/*
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/*
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* Data area reserved for FWNMI option.
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* Data area reserved for FWNMI option.
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* This address (0x7000) is fixed by the RPA.
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* This address (0x7000) is fixed by the RPA.
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@@ -1265,19 +1280,6 @@ unrecov_slb:
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fwnmi_data_area:
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fwnmi_data_area:
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.space PAGE_SIZE
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.space PAGE_SIZE
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- /*
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- * Space for the initial segment table
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- * For LPAR, the hypervisor must fill in at least one entry
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- * before we get control (with relocate on)
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- */
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- . = STAB0_PHYS_ADDR
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- .globl __start_stab
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-__start_stab:
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-
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- . = (STAB0_PHYS_ADDR + PAGE_SIZE)
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- .globl __end_stab
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-__end_stab:
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-
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/*
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/*
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* On pSeries, secondary processors spin in the following code.
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* On pSeries, secondary processors spin in the following code.
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* At entry, r3 = this processor's number (physical cpu id)
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* At entry, r3 = this processor's number (physical cpu id)
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