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@@ -1493,8 +1493,8 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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struct ssb_sprom *sprom = dev->dev->bus_sprom;
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struct ssb_sprom *sprom = dev->dev->bus_sprom;
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/* TX to RX */
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/* TX to RX */
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- u8 tx2rx_events[9] = { 0x4, 0x3, 0x6, 0x5, 0x2, 0x1, 0x8, 0x1F };
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- u8 tx2rx_delays[9] = { 8, 4, 2, 2, 4, 4, 6, 1 };
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+ u8 tx2rx_events[8] = { 0x4, 0x3, 0x6, 0x5, 0x2, 0x1, 0x8, 0x1F };
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+ u8 tx2rx_delays[8] = { 8, 4, 2, 2, 4, 4, 6, 1 };
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/* RX to TX */
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/* RX to TX */
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u8 rx2tx_events_ipa[9] = { 0x0, 0x1, 0x2, 0x8, 0x5, 0x6, 0xF, 0x3,
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u8 rx2tx_events_ipa[9] = { 0x0, 0x1, 0x2, 0x8, 0x5, 0x6, 0xF, 0x3,
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0x1F };
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0x1F };
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@@ -1505,6 +1505,9 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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u16 tmp16;
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u16 tmp16;
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u32 tmp32;
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u32 tmp32;
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+ b43_phy_write(dev, 0x23f, 0x1f8);
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+ b43_phy_write(dev, 0x240, 0x1f8);
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+
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tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
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tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
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tmp32 &= 0xffffff;
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tmp32 &= 0xffffff;
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b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
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b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
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@@ -1520,12 +1523,13 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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b43_phy_write(dev, 0x2AE, 0x000C);
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b43_phy_write(dev, 0x2AE, 0x000C);
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/* TX to RX */
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/* TX to RX */
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- b43_nphy_set_rf_sequence(dev, 1, tx2rx_events, tx2rx_delays, 9);
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+ b43_nphy_set_rf_sequence(dev, 1, tx2rx_events, tx2rx_delays,
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+ ARRAY_SIZE(tx2rx_events));
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/* RX to TX */
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/* RX to TX */
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if (b43_nphy_ipa(dev))
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if (b43_nphy_ipa(dev))
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- b43_nphy_set_rf_sequence(dev, 1, rx2tx_events_ipa,
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- rx2tx_delays_ipa, 9);
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+ b43_nphy_set_rf_sequence(dev, 0, rx2tx_events_ipa,
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+ rx2tx_delays_ipa, ARRAY_SIZE(rx2tx_events_ipa));
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if (nphy->hw_phyrxchain != 3 &&
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if (nphy->hw_phyrxchain != 3 &&
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nphy->hw_phyrxchain != nphy->hw_phytxchain) {
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nphy->hw_phyrxchain != nphy->hw_phytxchain) {
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if (b43_nphy_ipa(dev)) {
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if (b43_nphy_ipa(dev)) {
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@@ -1533,7 +1537,8 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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rx2tx_delays[6] = 1;
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rx2tx_delays[6] = 1;
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rx2tx_events[7] = 0x1F;
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rx2tx_events[7] = 0x1F;
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}
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}
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- b43_nphy_set_rf_sequence(dev, 1, rx2tx_events, rx2tx_delays, 9);
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+ b43_nphy_set_rf_sequence(dev, 1, rx2tx_events, rx2tx_delays,
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+ ARRAY_SIZE(rx2tx_events));
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}
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}
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tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ?
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tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ?
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@@ -1547,8 +1552,8 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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b43_nphy_gain_ctrl_workarounds(dev);
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b43_nphy_gain_ctrl_workarounds(dev);
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- b43_ntab_write(dev, B43_NTAB32(8, 0), 2);
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- b43_ntab_write(dev, B43_NTAB32(8, 16), 2);
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+ b43_ntab_write(dev, B43_NTAB16(8, 0), 2);
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+ b43_ntab_write(dev, B43_NTAB16(8, 16), 2);
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/* TODO */
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/* TODO */
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@@ -1560,6 +1565,8 @@ static void b43_nphy_workarounds_rev3plus(struct b43_wldev *dev)
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
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b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
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b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
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+ b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_CMFB_IDAC, 0x00);
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+ b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_CMFB_IDAC, 0x00);
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b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
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b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
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b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
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