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@@ -2565,62 +2565,60 @@ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq)
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void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
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{
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- if (sc->sc_flags & SC_OP_TXAGGR) {
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- struct ath_atx_tid *tid;
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- struct ath_atx_ac *ac;
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- int tidno, acno;
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-
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- /*
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- * Init per tid tx state
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- */
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- for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
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- tidno < WME_NUM_TID;
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- tidno++, tid++) {
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- tid->an = an;
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- tid->tidno = tidno;
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- tid->seq_start = tid->seq_next = 0;
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- tid->baw_size = WME_MAX_BA;
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- tid->baw_head = tid->baw_tail = 0;
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- tid->sched = false;
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- tid->paused = false;
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- tid->cleanup_inprogress = false;
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- INIT_LIST_HEAD(&tid->buf_q);
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-
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- acno = TID_TO_WME_AC(tidno);
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- tid->ac = &an->an_aggr.tx.ac[acno];
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+ struct ath_atx_tid *tid;
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+ struct ath_atx_ac *ac;
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+ int tidno, acno;
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- /* ADDBA state */
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- tid->addba_exchangecomplete = 0;
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- tid->addba_exchangeinprogress = 0;
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- tid->addba_exchangeattempts = 0;
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- }
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+ /*
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+ * Init per tid tx state
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+ */
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+ for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
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+ tidno < WME_NUM_TID;
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+ tidno++, tid++) {
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+ tid->an = an;
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+ tid->tidno = tidno;
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+ tid->seq_start = tid->seq_next = 0;
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+ tid->baw_size = WME_MAX_BA;
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+ tid->baw_head = tid->baw_tail = 0;
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+ tid->sched = false;
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+ tid->paused = false;
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+ tid->cleanup_inprogress = false;
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+ INIT_LIST_HEAD(&tid->buf_q);
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+
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+ acno = TID_TO_WME_AC(tidno);
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+ tid->ac = &an->an_aggr.tx.ac[acno];
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+
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+ /* ADDBA state */
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+ tid->addba_exchangecomplete = 0;
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+ tid->addba_exchangeinprogress = 0;
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+ tid->addba_exchangeattempts = 0;
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+ }
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- /*
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- * Init per ac tx state
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- */
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- for (acno = 0, ac = &an->an_aggr.tx.ac[acno];
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- acno < WME_NUM_AC; acno++, ac++) {
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- ac->sched = false;
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- INIT_LIST_HEAD(&ac->tid_q);
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-
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- switch (acno) {
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- case WME_AC_BE:
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- ac->qnum = ath_tx_get_qnum(sc,
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- ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
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- break;
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- case WME_AC_BK:
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- ac->qnum = ath_tx_get_qnum(sc,
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- ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BK);
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- break;
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- case WME_AC_VI:
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- ac->qnum = ath_tx_get_qnum(sc,
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- ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VI);
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- break;
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- case WME_AC_VO:
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- ac->qnum = ath_tx_get_qnum(sc,
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- ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VO);
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- break;
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- }
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+ /*
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+ * Init per ac tx state
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+ */
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+ for (acno = 0, ac = &an->an_aggr.tx.ac[acno];
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+ acno < WME_NUM_AC; acno++, ac++) {
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+ ac->sched = false;
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+ INIT_LIST_HEAD(&ac->tid_q);
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+
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+ switch (acno) {
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+ case WME_AC_BE:
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+ ac->qnum = ath_tx_get_qnum(sc,
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+ ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
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+ break;
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+ case WME_AC_BK:
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+ ac->qnum = ath_tx_get_qnum(sc,
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+ ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BK);
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+ break;
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+ case WME_AC_VI:
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+ ac->qnum = ath_tx_get_qnum(sc,
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+ ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VI);
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+ break;
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+ case WME_AC_VO:
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+ ac->qnum = ath_tx_get_qnum(sc,
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+ ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_VO);
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+ break;
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}
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}
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}
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@@ -2664,25 +2662,6 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
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}
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}
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-/* Cleanup per node transmit state */
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-
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-void ath_tx_node_free(struct ath_softc *sc, struct ath_node *an)
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-{
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- if (sc->sc_flags & SC_OP_TXAGGR) {
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- struct ath_atx_tid *tid;
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- int tidno, i;
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-
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- /* Init per tid rx state */
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- for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno];
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- tidno < WME_NUM_TID;
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- tidno++, tid++) {
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-
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- for (i = 0; i < ATH_TID_MAX_BUFS; i++)
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- ASSERT(tid->tx_buf[i] == NULL);
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- }
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- }
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-}
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-
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void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb)
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{
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int hdrlen, padsize;
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