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@@ -358,6 +358,75 @@ static int usbhs_runtime_suspend(struct device *dev)
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return 0;
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}
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+static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap,
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+ unsigned reg)
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+{
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+ struct usbhs_omap_platform_data *pdata = omap->pdata;
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+ int i;
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+
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+ for (i = 0; i < omap->nports; i++) {
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+ switch (pdata->port_mode[i]) {
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+ case OMAP_USBHS_PORT_MODE_UNUSED:
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+ reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i);
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+ break;
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+ case OMAP_EHCI_PORT_MODE_PHY:
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+ if (pdata->single_ulpi_bypass)
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+ break;
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+
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+ if (i == 0)
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+ reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
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+ else
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+ reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
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+ << (i-1));
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+ break;
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+ default:
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+ if (pdata->single_ulpi_bypass)
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+ break;
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+
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+ if (i == 0)
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+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
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+ else
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+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS
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+ << (i-1);
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+ break;
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+ }
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+ }
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+
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+ if (pdata->single_ulpi_bypass) {
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+ /* bypass ULPI only if none of the ports use PHY mode */
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+ reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
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+
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+ for (i = 0; i < omap->nports; i++) {
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+ if (is_ehci_phy_mode(pdata->port_mode[i])) {
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+ reg &= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
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+ break;
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+ }
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+ }
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+ }
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+
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+ return reg;
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+}
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+
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+static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,
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+ unsigned reg)
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+{
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+ struct usbhs_omap_platform_data *pdata = omap->pdata;
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+ int i;
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+
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+ for (i = 0; i < omap->nports; i++) {
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+ /* Clear port mode fields for PHY mode */
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+ reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i);
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+
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+ if (is_ehci_tll_mode(pdata->port_mode[i]) ||
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+ (is_ohci_port(pdata->port_mode[i])))
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+ reg |= OMAP4_P1_MODE_TLL << 2 * i;
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+ else if (is_ehci_hsic_mode(pdata->port_mode[i]))
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+ reg |= OMAP4_P1_MODE_HSIC << 2 * i;
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+ }
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+
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+ return reg;
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+}
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+
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static void omap_usbhs_init(struct device *dev)
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{
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struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
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@@ -389,54 +458,18 @@ static void omap_usbhs_init(struct device *dev)
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reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;
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reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
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- if (is_omap_usbhs_rev1(omap)) {
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- if (pdata->port_mode[0] == OMAP_USBHS_PORT_MODE_UNUSED)
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- reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;
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- if (pdata->port_mode[1] == OMAP_USBHS_PORT_MODE_UNUSED)
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- reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;
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- if (pdata->port_mode[2] == OMAP_USBHS_PORT_MODE_UNUSED)
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- reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;
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-
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- /* Bypass the TLL module for PHY mode operation */
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- if (pdata->single_ulpi_bypass) {
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- dev_dbg(dev, "OMAP3 ES version <= ES2.1\n");
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- if (is_ehci_phy_mode(pdata->port_mode[0]) ||
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- is_ehci_phy_mode(pdata->port_mode[1]) ||
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- is_ehci_phy_mode(pdata->port_mode[2]))
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- reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
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- else
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- reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
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- } else {
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- dev_dbg(dev, "OMAP3 ES version > ES2.1\n");
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- if (is_ehci_phy_mode(pdata->port_mode[0]))
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- reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
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- else
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- reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
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- if (is_ehci_phy_mode(pdata->port_mode[1]))
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- reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
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- else
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- reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
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- if (is_ehci_phy_mode(pdata->port_mode[2]))
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- reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
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- else
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- reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
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- }
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- } else if (is_omap_usbhs_rev2(omap)) {
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- /* Clear port mode fields for PHY mode*/
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- reg &= ~OMAP4_P1_MODE_CLEAR;
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- reg &= ~OMAP4_P2_MODE_CLEAR;
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-
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- if (is_ehci_tll_mode(pdata->port_mode[0]) ||
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- (is_ohci_port(pdata->port_mode[0])))
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- reg |= OMAP4_P1_MODE_TLL;
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- else if (is_ehci_hsic_mode(pdata->port_mode[0]))
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- reg |= OMAP4_P1_MODE_HSIC;
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-
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- if (is_ehci_tll_mode(pdata->port_mode[1]) ||
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- (is_ohci_port(pdata->port_mode[1])))
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- reg |= OMAP4_P2_MODE_TLL;
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- else if (is_ehci_hsic_mode(pdata->port_mode[1]))
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- reg |= OMAP4_P2_MODE_HSIC;
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+ switch (omap->usbhs_rev) {
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+ case OMAP_USBHS_REV1:
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+ omap_usbhs_rev1_hostconfig(omap, reg);
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+ break;
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+
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+ case OMAP_USBHS_REV2:
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+ omap_usbhs_rev2_hostconfig(omap, reg);
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+ break;
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+
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+ default: /* newer revisions */
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+ omap_usbhs_rev2_hostconfig(omap, reg);
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+ break;
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}
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usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
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