|
@@ -580,7 +580,7 @@ int radeon_cs_finish_pages(struct radeon_cs_parser *p)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
|
|
|
+static int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
|
|
|
{
|
|
|
int new_page;
|
|
|
struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
|
|
@@ -623,3 +623,28 @@ int radeon_cs_update_pages(struct radeon_cs_parser *p, int pg_idx)
|
|
|
|
|
|
return new_page;
|
|
|
}
|
|
|
+
|
|
|
+u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx)
|
|
|
+{
|
|
|
+ struct radeon_cs_chunk *ibc = &p->chunks[p->chunk_ib_idx];
|
|
|
+ u32 pg_idx, pg_offset;
|
|
|
+ u32 idx_value = 0;
|
|
|
+ int new_page;
|
|
|
+
|
|
|
+ pg_idx = (idx * 4) / PAGE_SIZE;
|
|
|
+ pg_offset = (idx * 4) % PAGE_SIZE;
|
|
|
+
|
|
|
+ if (ibc->kpage_idx[0] == pg_idx)
|
|
|
+ return ibc->kpage[0][pg_offset/4];
|
|
|
+ if (ibc->kpage_idx[1] == pg_idx)
|
|
|
+ return ibc->kpage[1][pg_offset/4];
|
|
|
+
|
|
|
+ new_page = radeon_cs_update_pages(p, pg_idx);
|
|
|
+ if (new_page < 0) {
|
|
|
+ p->parser_error = new_page;
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ idx_value = ibc->kpage[new_page][pg_offset/4];
|
|
|
+ return idx_value;
|
|
|
+}
|