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@@ -75,7 +75,7 @@ u64 x86_perf_event_update(struct perf_event *event)
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*/
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again:
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prev_raw_count = local64_read(&hwc->prev_count);
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- rdmsrl(hwc->event_base, new_raw_count);
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+ rdpmcl(hwc->event_base_rdpmc, new_raw_count);
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count)
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@@ -819,9 +819,11 @@ static inline void x86_assign_hw_event(struct perf_event *event,
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} else if (hwc->idx >= X86_PMC_IDX_FIXED) {
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hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
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hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - X86_PMC_IDX_FIXED);
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+ hwc->event_base_rdpmc = (hwc->idx - X86_PMC_IDX_FIXED) | 1<<30;
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} else {
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hwc->config_base = x86_pmu_config_addr(hwc->idx);
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hwc->event_base = x86_pmu_event_addr(hwc->idx);
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+ hwc->event_base_rdpmc = x86_pmu_addr_offset(hwc->idx);
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}
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}
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