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@@ -41,8 +41,9 @@
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/scatterlist.h>
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-
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+#include <linux/leds.h>
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#include <linux/mmc/host.h>
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+
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#include <asm/io.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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@@ -54,6 +55,7 @@
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#define DRIVER_NAME "au1xxx-mmc"
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/* Set this to enable special debugging macros */
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+/* #define DEBUG */
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#ifdef DEBUG
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#define DBG(fmt, idx, args...) printk("au1xx(%d): DEBUG: " fmt, idx, ##args)
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@@ -61,32 +63,6 @@
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#define DBG(fmt, idx, args...)
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#endif
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-const struct {
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- u32 iobase;
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- u32 tx_devid, rx_devid;
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- u16 bcsrpwr;
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- u16 bcsrstatus;
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- u16 wpstatus;
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-} au1xmmc_card_table[] = {
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- { SD0_BASE, DSCR_CMD0_SDMS_TX0, DSCR_CMD0_SDMS_RX0,
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- BCSR_BOARD_SD0PWR, BCSR_INT_SD0INSERT, BCSR_STATUS_SD0WP },
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-#ifndef CONFIG_MIPS_DB1200
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- { SD1_BASE, DSCR_CMD0_SDMS_TX1, DSCR_CMD0_SDMS_RX1,
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- BCSR_BOARD_DS1PWR, BCSR_INT_SD1INSERT, BCSR_STATUS_SD1WP }
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-#endif
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-};
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-
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-#define AU1XMMC_CONTROLLER_COUNT (ARRAY_SIZE(au1xmmc_card_table))
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-
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-/* This array stores pointers for the hosts (used by the IRQ handler) */
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-struct au1xmmc_host *au1xmmc_hosts[AU1XMMC_CONTROLLER_COUNT];
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-static int dma = 1;
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-
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-#ifdef MODULE
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-module_param(dma, bool, 0);
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-MODULE_PARM_DESC(dma, "Use DMA engine for data transfers (0 = disabled)");
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-#endif
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-
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static inline void IRQ_ON(struct au1xmmc_host *host, u32 mask)
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{
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u32 val = au_readl(HOST_CONFIG(host));
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@@ -135,26 +111,33 @@ static inline void SEND_STOP(struct au1xmmc_host *host)
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static void au1xmmc_set_power(struct au1xmmc_host *host, int state)
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{
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-
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- u32 val = au1xmmc_card_table[host->id].bcsrpwr;
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-
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- bcsr->board &= ~val;
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- if (state) bcsr->board |= val;
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-
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- au_sync_delay(1);
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+ if (host->platdata && host->platdata->set_power)
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+ host->platdata->set_power(host->mmc, state);
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}
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-static inline int au1xmmc_card_inserted(struct au1xmmc_host *host)
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+static int au1xmmc_card_inserted(struct au1xmmc_host *host)
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{
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- return (bcsr->sig_status & au1xmmc_card_table[host->id].bcsrstatus)
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- ? 1 : 0;
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+ int ret;
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+
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+ if (host->platdata && host->platdata->card_inserted)
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+ ret = host->platdata->card_inserted(host->mmc);
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+ else
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+ ret = 1; /* assume there is a card */
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+
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+ return ret;
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}
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static int au1xmmc_card_readonly(struct mmc_host *mmc)
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{
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struct au1xmmc_host *host = mmc_priv(mmc);
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- return (bcsr->status & au1xmmc_card_table[host->id].wpstatus)
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- ? 1 : 0;
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+ int ret;
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+
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+ if (host->platdata && host->platdata->card_readonly)
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+ ret = host->platdata->card_readonly(mmc);
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+ else
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+ ret = 0; /* assume card is read-write */
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+
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+ return ret;
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}
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static void au1xmmc_finish_request(struct au1xmmc_host *host)
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@@ -163,7 +146,7 @@ static void au1xmmc_finish_request(struct au1xmmc_host *host)
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struct mmc_request *mrq = host->mrq;
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host->mrq = NULL;
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- host->flags &= HOST_F_ACTIVE;
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+ host->flags &= HOST_F_ACTIVE | HOST_F_DMA;
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host->dma.len = 0;
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host->dma.dir = 0;
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@@ -174,8 +157,6 @@ static void au1xmmc_finish_request(struct au1xmmc_host *host)
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host->status = HOST_S_IDLE;
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- bcsr->disk_leds |= (1 << 8);
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-
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mmc_request_done(host->mmc, mrq);
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}
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@@ -299,11 +280,13 @@ static void au1xmmc_data_complete(struct au1xmmc_host *host, u32 status)
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if (!data->error) {
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if (host->flags & HOST_F_DMA) {
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+#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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u32 chan = DMA_CHANNEL(host);
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chan_tab_t *c = *((chan_tab_t **) chan);
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au1x_dma_chan_t *cp = c->chan_ptr;
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data->bytes_xfered = cp->ddma_bytecnt;
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+#endif
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}
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else
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data->bytes_xfered =
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@@ -420,18 +403,18 @@ static void au1xmmc_receive_pio(struct au1xmmc_host *host)
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break;
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if (status & SD_STATUS_RC) {
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- DBG("RX CRC Error [%d + %d].\n", host->id,
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+ DBG("RX CRC Error [%d + %d].\n", host->pdev->id,
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host->pio.len, count);
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break;
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}
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if (status & SD_STATUS_RO) {
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- DBG("RX Overrun [%d + %d]\n", host->id,
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+ DBG("RX Overrun [%d + %d]\n", host->pdev->id,
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host->pio.len, count);
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break;
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}
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else if (status & SD_STATUS_RU) {
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- DBG("RX Underrun [%d + %d]\n", host->id,
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+ DBG("RX Underrun [%d + %d]\n", host->pdev->id,
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host->pio.len, count);
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break;
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}
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@@ -528,6 +511,7 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
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host->status = HOST_S_DATA;
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if (host->flags & HOST_F_DMA) {
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+#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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u32 channel = DMA_CHANNEL(host);
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/* Start the DMA as soon as the buffer gets something in it */
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@@ -540,6 +524,7 @@ static void au1xmmc_cmd_complete(struct au1xmmc_host *host, u32 status)
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}
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au1xxx_dbdma_start(channel);
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+#endif
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}
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}
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@@ -571,12 +556,8 @@ static void au1xmmc_set_clock(struct au1xmmc_host *host, int rate)
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static int
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au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
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{
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-
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int datalen = data->blocks * data->blksz;
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- if (dma != 0)
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- host->flags |= HOST_F_DMA;
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-
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if (data->flags & MMC_DATA_READ)
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host->flags |= HOST_F_RECV;
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else
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@@ -596,6 +577,7 @@ au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
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au_writel(data->blksz - 1, HOST_BLKSIZE(host));
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if (host->flags & HOST_F_DMA) {
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+#ifdef CONFIG_SOC_AU1200 /* DBDMA */
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int i;
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u32 channel = DMA_CHANNEL(host);
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@@ -621,11 +603,12 @@ au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
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len, flags);
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}
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- if (!ret)
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+ if (!ret)
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goto dataerr;
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datalen -= len;
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}
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+#endif
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}
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else {
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host->pio.index = 0;
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@@ -641,8 +624,9 @@ au1xmmc_prepare_data(struct au1xmmc_host *host, struct mmc_data *data)
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return 0;
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- dataerr:
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- dma_unmap_sg(mmc_dev(host->mmc),data->sg,data->sg_len,host->dma.dir);
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+dataerr:
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+ dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
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+ host->dma.dir);
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return -ETIMEDOUT;
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}
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@@ -663,8 +647,6 @@ static void au1xmmc_request(struct mmc_host* mmc, struct mmc_request* mrq)
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host->mrq = mrq;
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host->status = HOST_S_CMD;
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- bcsr->disk_leds &= ~(1 << 8);
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-
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if (mrq->data) {
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FLUSH_FIFO(host);
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flags = mrq->data->flags;
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@@ -728,149 +710,145 @@ static void au1xmmc_set_ios(struct mmc_host* mmc, struct mmc_ios* ios)
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}
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}
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-static void au1xmmc_dma_callback(int irq, void *dev_id)
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-{
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- struct au1xmmc_host *host = (struct au1xmmc_host *) dev_id;
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-
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- /* Avoid spurious interrupts */
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-
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- if (!host->mrq)
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- return;
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-
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- if (host->flags & HOST_F_STOP)
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- SEND_STOP(host);
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-
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- tasklet_schedule(&host->data_task);
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-}
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-
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#define STATUS_TIMEOUT (SD_STATUS_RAT | SD_STATUS_DT)
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#define STATUS_DATA_IN (SD_STATUS_NE)
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#define STATUS_DATA_OUT (SD_STATUS_TH)
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static irqreturn_t au1xmmc_irq(int irq, void *dev_id)
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{
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-
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+ struct au1xmmc_host *host = dev_id;
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u32 status;
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- int i, ret = 0;
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-
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- disable_irq(AU1100_SD_IRQ);
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- for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
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- struct au1xmmc_host * host = au1xmmc_hosts[i];
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- u32 handled = 1;
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-
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- status = au_readl(HOST_STATUS(host));
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+ status = au_readl(HOST_STATUS(host));
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- if (host->mrq && (status & STATUS_TIMEOUT)) {
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- if (status & SD_STATUS_RAT)
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- host->mrq->cmd->error = -ETIMEDOUT;
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+ if (!(status & SD_STATUS_I))
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+ return IRQ_NONE; /* not ours */
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- else if (status & SD_STATUS_DT)
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- host->mrq->data->error = -ETIMEDOUT;
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+ if (host->mrq && (status & STATUS_TIMEOUT)) {
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+ if (status & SD_STATUS_RAT)
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+ host->mrq->cmd->error = -ETIMEDOUT;
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+ else if (status & SD_STATUS_DT)
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+ host->mrq->data->error = -ETIMEDOUT;
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- /* In PIO mode, interrupts might still be enabled */
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- IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH);
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+ /* In PIO mode, interrupts might still be enabled */
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+ IRQ_OFF(host, SD_CONFIG_NE | SD_CONFIG_TH);
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- //IRQ_OFF(host, SD_CONFIG_TH|SD_CONFIG_RA|SD_CONFIG_RF);
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- tasklet_schedule(&host->finish_task);
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- }
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+ /* IRQ_OFF(host, SD_CONFIG_TH | SD_CONFIG_RA | SD_CONFIG_RF); */
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+ tasklet_schedule(&host->finish_task);
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+ }
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#if 0
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- else if (status & SD_STATUS_DD) {
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-
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- /* Sometimes we get a DD before a NE in PIO mode */
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-
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- if (!(host->flags & HOST_F_DMA) &&
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- (status & SD_STATUS_NE))
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- au1xmmc_receive_pio(host);
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- else {
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- au1xmmc_data_complete(host, status);
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- //tasklet_schedule(&host->data_task);
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- }
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- }
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-#endif
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- else if (status & (SD_STATUS_CR)) {
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- if (host->status == HOST_S_CMD)
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- au1xmmc_cmd_complete(host,status);
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- }
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- else if (!(host->flags & HOST_F_DMA)) {
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- if ((host->flags & HOST_F_XMIT) &&
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- (status & STATUS_DATA_OUT))
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- au1xmmc_send_pio(host);
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- else if ((host->flags & HOST_F_RECV) &&
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- (status & STATUS_DATA_IN))
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- au1xmmc_receive_pio(host);
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- }
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- else if (status & 0x203FBC70) {
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- DBG("Unhandled status %8.8x\n", host->id, status);
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- handled = 0;
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+ else if (status & SD_STATUS_DD) {
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+ /* Sometimes we get a DD before a NE in PIO mode */
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+ if (!(host->flags & HOST_F_DMA) && (status & SD_STATUS_NE))
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+ au1xmmc_receive_pio(host);
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+ else {
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+ au1xmmc_data_complete(host, status);
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+ /* tasklet_schedule(&host->data_task); */
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}
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-
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- au_writel(status, HOST_STATUS(host));
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- au_sync();
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-
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- ret |= handled;
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}
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-
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- enable_irq(AU1100_SD_IRQ);
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- return ret;
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-}
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-
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-static void au1xmmc_poll_event(unsigned long arg)
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-{
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- struct au1xmmc_host *host = (struct au1xmmc_host *) arg;
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-
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- int card = au1xmmc_card_inserted(host);
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- int controller = (host->flags & HOST_F_ACTIVE) ? 1 : 0;
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-
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- if (card != controller) {
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- host->flags &= ~HOST_F_ACTIVE;
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- if (card) host->flags |= HOST_F_ACTIVE;
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- mmc_detect_change(host->mmc, 0);
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+#endif
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+ else if (status & SD_STATUS_CR) {
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+ if (host->status == HOST_S_CMD)
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+ au1xmmc_cmd_complete(host, status);
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+
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+ } else if (!(host->flags & HOST_F_DMA)) {
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+ if ((host->flags & HOST_F_XMIT) && (status & STATUS_DATA_OUT))
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+ au1xmmc_send_pio(host);
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+ else if ((host->flags & HOST_F_RECV) && (status & STATUS_DATA_IN))
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+ au1xmmc_receive_pio(host);
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+
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+ } else if (status & 0x203F3C70) {
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+ DBG("Unhandled status %8.8x\n", host->pdev->id,
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+ status);
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}
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- if (host->mrq != NULL) {
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- u32 status = au_readl(HOST_STATUS(host));
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- DBG("PENDING - %8.8x\n", host->id, status);
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- }
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+ au_writel(status, HOST_STATUS(host));
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+ au_sync();
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- mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
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+ return IRQ_HANDLED;
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}
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-static dbdev_tab_t au1xmmc_mem_dbdev =
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-{
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- DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 8, 0x00000000, 0, 0
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+#ifdef CONFIG_SOC_AU1200
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+/* 8bit memory DMA device */
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+static dbdev_tab_t au1xmmc_mem_dbdev = {
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+ .dev_id = DSCR_CMD0_ALWAYS,
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+ .dev_flags = DEV_FLAGS_ANYUSE,
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+ .dev_tsize = 0,
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+ .dev_devwidth = 8,
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+ .dev_physaddr = 0x00000000,
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+ .dev_intlevel = 0,
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+ .dev_intpolarity = 0,
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};
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+static int memid;
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-static void au1xmmc_init_dma(struct au1xmmc_host *host)
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+static void au1xmmc_dbdma_callback(int irq, void *dev_id)
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{
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|
|
+ struct au1xmmc_host *host = (struct au1xmmc_host *)dev_id;
|
|
|
|
|
|
- u32 rxchan, txchan;
|
|
|
+ /* Avoid spurious interrupts */
|
|
|
+ if (!host->mrq)
|
|
|
+ return;
|
|
|
|
|
|
- int txid = au1xmmc_card_table[host->id].tx_devid;
|
|
|
- int rxid = au1xmmc_card_table[host->id].rx_devid;
|
|
|
+ if (host->flags & HOST_F_STOP)
|
|
|
+ SEND_STOP(host);
|
|
|
|
|
|
- /* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
|
|
|
- of 8 bits. And since devices are shared, we need to create
|
|
|
- our own to avoid freaking out other devices
|
|
|
- */
|
|
|
+ tasklet_schedule(&host->data_task);
|
|
|
+}
|
|
|
|
|
|
- int memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
|
|
|
+static int au1xmmc_dbdma_init(struct au1xmmc_host *host)
|
|
|
+{
|
|
|
+ struct resource *res;
|
|
|
+ int txid, rxid;
|
|
|
+
|
|
|
+ res = platform_get_resource(host->pdev, IORESOURCE_DMA, 0);
|
|
|
+ if (!res)
|
|
|
+ return -ENODEV;
|
|
|
+ txid = res->start;
|
|
|
+
|
|
|
+ res = platform_get_resource(host->pdev, IORESOURCE_DMA, 1);
|
|
|
+ if (!res)
|
|
|
+ return -ENODEV;
|
|
|
+ rxid = res->start;
|
|
|
+
|
|
|
+ if (!memid)
|
|
|
+ return -ENODEV;
|
|
|
+
|
|
|
+ host->tx_chan = au1xxx_dbdma_chan_alloc(memid, txid,
|
|
|
+ au1xmmc_dbdma_callback, (void *)host);
|
|
|
+ if (!host->tx_chan) {
|
|
|
+ dev_err(&host->pdev->dev, "cannot allocate TX DMA\n");
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+
|
|
|
+ host->rx_chan = au1xxx_dbdma_chan_alloc(rxid, memid,
|
|
|
+ au1xmmc_dbdma_callback, (void *)host);
|
|
|
+ if (!host->rx_chan) {
|
|
|
+ dev_err(&host->pdev->dev, "cannot allocate RX DMA\n");
|
|
|
+ au1xxx_dbdma_chan_free(host->tx_chan);
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
|
|
|
- txchan = au1xxx_dbdma_chan_alloc(memid, txid,
|
|
|
- au1xmmc_dma_callback, (void *) host);
|
|
|
+ au1xxx_dbdma_set_devwidth(host->tx_chan, 8);
|
|
|
+ au1xxx_dbdma_set_devwidth(host->rx_chan, 8);
|
|
|
|
|
|
- rxchan = au1xxx_dbdma_chan_alloc(rxid, memid,
|
|
|
- au1xmmc_dma_callback, (void *) host);
|
|
|
+ au1xxx_dbdma_ring_alloc(host->tx_chan, AU1XMMC_DESCRIPTOR_COUNT);
|
|
|
+ au1xxx_dbdma_ring_alloc(host->rx_chan, AU1XMMC_DESCRIPTOR_COUNT);
|
|
|
|
|
|
- au1xxx_dbdma_set_devwidth(txchan, 8);
|
|
|
- au1xxx_dbdma_set_devwidth(rxchan, 8);
|
|
|
+ /* DBDMA is good to go */
|
|
|
+ host->flags |= HOST_F_DMA;
|
|
|
|
|
|
- au1xxx_dbdma_ring_alloc(txchan, AU1XMMC_DESCRIPTOR_COUNT);
|
|
|
- au1xxx_dbdma_ring_alloc(rxchan, AU1XMMC_DESCRIPTOR_COUNT);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
|
|
|
- host->tx_chan = txchan;
|
|
|
- host->rx_chan = rxchan;
|
|
|
+static void au1xmmc_dbdma_shutdown(struct au1xmmc_host *host)
|
|
|
+{
|
|
|
+ if (host->flags & HOST_F_DMA) {
|
|
|
+ host->flags &= ~HOST_F_DMA;
|
|
|
+ au1xxx_dbdma_chan_free(host->tx_chan);
|
|
|
+ au1xxx_dbdma_chan_free(host->rx_chan);
|
|
|
+ }
|
|
|
}
|
|
|
+#endif
|
|
|
|
|
|
static const struct mmc_host_ops au1xmmc_ops = {
|
|
|
.request = au1xmmc_request,
|
|
@@ -878,116 +856,235 @@ static const struct mmc_host_ops au1xmmc_ops = {
|
|
|
.get_ro = au1xmmc_card_readonly,
|
|
|
};
|
|
|
|
|
|
-static int __devinit au1xmmc_probe(struct platform_device *pdev)
|
|
|
+static void au1xmmc_poll_event(unsigned long arg)
|
|
|
{
|
|
|
+ struct au1xmmc_host *host = (struct au1xmmc_host *)arg;
|
|
|
+ int card = au1xmmc_card_inserted(host);
|
|
|
+ int controller = (host->flags & HOST_F_ACTIVE) ? 1 : 0;
|
|
|
+
|
|
|
+ if (card != controller) {
|
|
|
+ host->flags &= ~HOST_F_ACTIVE;
|
|
|
+ if (card)
|
|
|
+ host->flags |= HOST_F_ACTIVE;
|
|
|
+ mmc_detect_change(host->mmc, 0);
|
|
|
+ }
|
|
|
|
|
|
- int i, ret = 0;
|
|
|
+#ifdef DEBUG
|
|
|
+ if (host->mrq != NULL) {
|
|
|
+ u32 status = au_readl(HOST_STATUS(host));
|
|
|
+ DBG("PENDING - %8.8x\n", host->pdev->id, status);
|
|
|
+ }
|
|
|
+#endif
|
|
|
+ mod_timer(&host->timer, jiffies + AU1XMMC_DETECT_TIMEOUT);
|
|
|
+}
|
|
|
|
|
|
- /* THe interrupt is shared among all controllers */
|
|
|
- ret = request_irq(AU1100_SD_IRQ, au1xmmc_irq, IRQF_DISABLED, "MMC", 0);
|
|
|
+static void au1xmmc_init_cd_poll_timer(struct au1xmmc_host *host)
|
|
|
+{
|
|
|
+ init_timer(&host->timer);
|
|
|
+ host->timer.function = au1xmmc_poll_event;
|
|
|
+ host->timer.data = (unsigned long)host;
|
|
|
+ host->timer.expires = jiffies + AU1XMMC_DETECT_TIMEOUT;
|
|
|
+}
|
|
|
|
|
|
- if (ret) {
|
|
|
- printk(DRIVER_NAME "ERROR: Couldn't get int %d: %d\n",
|
|
|
- AU1100_SD_IRQ, ret);
|
|
|
- return -ENXIO;
|
|
|
+static int __devinit au1xmmc_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct mmc_host *mmc;
|
|
|
+ struct au1xmmc_host *host;
|
|
|
+ struct resource *r;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ mmc = mmc_alloc_host(sizeof(struct au1xmmc_host), &pdev->dev);
|
|
|
+ if (!mmc) {
|
|
|
+ dev_err(&pdev->dev, "no memory for mmc_host\n");
|
|
|
+ ret = -ENOMEM;
|
|
|
+ goto out0;
|
|
|
}
|
|
|
|
|
|
- disable_irq(AU1100_SD_IRQ);
|
|
|
+ host = mmc_priv(mmc);
|
|
|
+ host->mmc = mmc;
|
|
|
+ host->platdata = pdev->dev.platform_data;
|
|
|
+ host->pdev = pdev;
|
|
|
|
|
|
- for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
|
|
|
- struct mmc_host *mmc = mmc_alloc_host(sizeof(struct au1xmmc_host), &pdev->dev);
|
|
|
- struct au1xmmc_host *host = 0;
|
|
|
+ ret = -ENODEV;
|
|
|
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
+ if (!r) {
|
|
|
+ dev_err(&pdev->dev, "no mmio defined\n");
|
|
|
+ goto out1;
|
|
|
+ }
|
|
|
|
|
|
- if (!mmc) {
|
|
|
- printk(DRIVER_NAME "ERROR: no mem for host %d\n", i);
|
|
|
- au1xmmc_hosts[i] = 0;
|
|
|
- continue;
|
|
|
- }
|
|
|
+ host->ioarea = request_mem_region(r->start, r->end - r->start + 1,
|
|
|
+ pdev->name);
|
|
|
+ if (!host->ioarea) {
|
|
|
+ dev_err(&pdev->dev, "mmio already in use\n");
|
|
|
+ goto out1;
|
|
|
+ }
|
|
|
|
|
|
- mmc->ops = &au1xmmc_ops;
|
|
|
+ host->iobase = (unsigned long)ioremap(r->start, 0x3c);
|
|
|
+ if (!host->iobase) {
|
|
|
+ dev_err(&pdev->dev, "cannot remap mmio\n");
|
|
|
+ goto out2;
|
|
|
+ }
|
|
|
+
|
|
|
+ r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
+ if (!r) {
|
|
|
+ dev_err(&pdev->dev, "no IRQ defined\n");
|
|
|
+ goto out3;
|
|
|
+ }
|
|
|
|
|
|
- mmc->f_min = 450000;
|
|
|
- mmc->f_max = 24000000;
|
|
|
+ host->irq = r->start;
|
|
|
+ /* IRQ is shared among both SD controllers */
|
|
|
+ ret = request_irq(host->irq, au1xmmc_irq, IRQF_SHARED,
|
|
|
+ DRIVER_NAME, host);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "cannot grab IRQ\n");
|
|
|
+ goto out3;
|
|
|
+ }
|
|
|
|
|
|
- mmc->max_seg_size = AU1XMMC_DESCRIPTOR_SIZE;
|
|
|
- mmc->max_phys_segs = AU1XMMC_DESCRIPTOR_COUNT;
|
|
|
+ mmc->ops = &au1xmmc_ops;
|
|
|
|
|
|
- mmc->max_blk_size = 2048;
|
|
|
- mmc->max_blk_count = 512;
|
|
|
+ mmc->f_min = 450000;
|
|
|
+ mmc->f_max = 24000000;
|
|
|
|
|
|
- mmc->ocr_avail = AU1XMMC_OCR;
|
|
|
+ mmc->max_seg_size = AU1XMMC_DESCRIPTOR_SIZE;
|
|
|
+ mmc->max_phys_segs = AU1XMMC_DESCRIPTOR_COUNT;
|
|
|
|
|
|
- host = mmc_priv(mmc);
|
|
|
- host->mmc = mmc;
|
|
|
+ mmc->max_blk_size = 2048;
|
|
|
+ mmc->max_blk_count = 512;
|
|
|
|
|
|
- host->id = i;
|
|
|
- host->iobase = au1xmmc_card_table[host->id].iobase;
|
|
|
- host->clock = 0;
|
|
|
- host->power_mode = MMC_POWER_OFF;
|
|
|
+ mmc->ocr_avail = AU1XMMC_OCR;
|
|
|
+ mmc->caps = 0;
|
|
|
|
|
|
- host->flags = au1xmmc_card_inserted(host) ? HOST_F_ACTIVE : 0;
|
|
|
- host->status = HOST_S_IDLE;
|
|
|
+ host->status = HOST_S_IDLE;
|
|
|
|
|
|
- init_timer(&host->timer);
|
|
|
+ /* board-specific carddetect setup, if any */
|
|
|
+ if (host->platdata && host->platdata->cd_setup) {
|
|
|
+ ret = host->platdata->cd_setup(mmc, 1);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "board CD setup failed\n");
|
|
|
+ goto out4;
|
|
|
+ }
|
|
|
+ } else {
|
|
|
+ /* poll the board-specific is-card-in-socket-? method */
|
|
|
+ au1xmmc_init_cd_poll_timer(host);
|
|
|
+ }
|
|
|
|
|
|
- host->timer.function = au1xmmc_poll_event;
|
|
|
- host->timer.data = (unsigned long) host;
|
|
|
- host->timer.expires = jiffies + AU1XMMC_DETECT_TIMEOUT;
|
|
|
+ tasklet_init(&host->data_task, au1xmmc_tasklet_data,
|
|
|
+ (unsigned long)host);
|
|
|
|
|
|
- tasklet_init(&host->data_task, au1xmmc_tasklet_data,
|
|
|
- (unsigned long) host);
|
|
|
+ tasklet_init(&host->finish_task, au1xmmc_tasklet_finish,
|
|
|
+ (unsigned long)host);
|
|
|
|
|
|
- tasklet_init(&host->finish_task, au1xmmc_tasklet_finish,
|
|
|
- (unsigned long) host);
|
|
|
+#ifdef CONFIG_SOC_AU1200
|
|
|
+ ret = au1xmmc_dbdma_init(host);
|
|
|
+ if (ret)
|
|
|
+ printk(KERN_INFO DRIVER_NAME ": DBDMA init failed; using PIO\n");
|
|
|
+#endif
|
|
|
|
|
|
- spin_lock_init(&host->lock);
|
|
|
+#ifdef CONFIG_LEDS_CLASS
|
|
|
+ if (host->platdata && host->platdata->led) {
|
|
|
+ struct led_classdev *led = host->platdata->led;
|
|
|
+ led->name = mmc_hostname(mmc);
|
|
|
+ led->brightness = LED_OFF;
|
|
|
+ led->default_trigger = mmc_hostname(mmc);
|
|
|
+ ret = led_classdev_register(mmc_dev(mmc), led);
|
|
|
+ if (ret)
|
|
|
+ goto out5;
|
|
|
+ }
|
|
|
+#endif
|
|
|
|
|
|
- if (dma != 0)
|
|
|
- au1xmmc_init_dma(host);
|
|
|
+ au1xmmc_reset_controller(host);
|
|
|
|
|
|
- au1xmmc_reset_controller(host);
|
|
|
+ ret = mmc_add_host(mmc);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "cannot add mmc host\n");
|
|
|
+ goto out6;
|
|
|
+ }
|
|
|
|
|
|
- mmc_add_host(mmc);
|
|
|
- au1xmmc_hosts[i] = host;
|
|
|
+ platform_set_drvdata(pdev, mmc);
|
|
|
|
|
|
+ /* start the carddetect poll timer if necessary */
|
|
|
+ if (!(host->platdata && host->platdata->cd_setup))
|
|
|
add_timer(&host->timer);
|
|
|
|
|
|
- printk(KERN_INFO DRIVER_NAME ": MMC Controller %d set up at %8.8X (mode=%s)\n",
|
|
|
- host->id, host->iobase, dma ? "dma" : "pio");
|
|
|
- }
|
|
|
+ printk(KERN_INFO DRIVER_NAME ": MMC Controller %d set up at %8.8X"
|
|
|
+ " (mode=%s)\n", pdev->id, host->iobase,
|
|
|
+ host->flags & HOST_F_DMA ? "dma" : "pio");
|
|
|
|
|
|
- enable_irq(AU1100_SD_IRQ);
|
|
|
+ return 0; /* all ok */
|
|
|
|
|
|
- return 0;
|
|
|
+out6:
|
|
|
+#ifdef CONFIG_LEDS_CLASS
|
|
|
+ if (host->platdata && host->platdata->led)
|
|
|
+ led_classdev_unregister(host->platdata->led);
|
|
|
+out5:
|
|
|
+#endif
|
|
|
+ au_writel(0, HOST_ENABLE(host));
|
|
|
+ au_writel(0, HOST_CONFIG(host));
|
|
|
+ au_writel(0, HOST_CONFIG2(host));
|
|
|
+ au_sync();
|
|
|
+
|
|
|
+#ifdef CONFIG_SOC_AU1200
|
|
|
+ au1xmmc_dbdma_shutdown(host);
|
|
|
+#endif
|
|
|
+
|
|
|
+ tasklet_kill(&host->data_task);
|
|
|
+ tasklet_kill(&host->finish_task);
|
|
|
+
|
|
|
+ if (host->platdata && host->platdata->cd_setup)
|
|
|
+ host->platdata->cd_setup(mmc, 0);
|
|
|
+out4:
|
|
|
+ free_irq(host->irq, host);
|
|
|
+out3:
|
|
|
+ iounmap((void *)host->iobase);
|
|
|
+out2:
|
|
|
+ release_resource(host->ioarea);
|
|
|
+ kfree(host->ioarea);
|
|
|
+out1:
|
|
|
+ mmc_free_host(mmc);
|
|
|
+out0:
|
|
|
+ return ret;
|
|
|
}
|
|
|
|
|
|
static int __devexit au1xmmc_remove(struct platform_device *pdev)
|
|
|
{
|
|
|
+ struct mmc_host *mmc = platform_get_drvdata(pdev);
|
|
|
+ struct au1xmmc_host *host;
|
|
|
+
|
|
|
+ if (mmc) {
|
|
|
+ host = mmc_priv(mmc);
|
|
|
+
|
|
|
+ mmc_remove_host(mmc);
|
|
|
|
|
|
- int i;
|
|
|
+#ifdef CONFIG_LEDS_CLASS
|
|
|
+ if (host->platdata && host->platdata->led)
|
|
|
+ led_classdev_unregister(host->platdata->led);
|
|
|
+#endif
|
|
|
|
|
|
- disable_irq(AU1100_SD_IRQ);
|
|
|
+ if (host->platdata && host->platdata->cd_setup)
|
|
|
+ host->platdata->cd_setup(mmc, 0);
|
|
|
+ else
|
|
|
+ del_timer_sync(&host->timer);
|
|
|
|
|
|
- for(i = 0; i < AU1XMMC_CONTROLLER_COUNT; i++) {
|
|
|
- struct au1xmmc_host *host = au1xmmc_hosts[i];
|
|
|
- if (!host) continue;
|
|
|
+ au_writel(0, HOST_ENABLE(host));
|
|
|
+ au_writel(0, HOST_CONFIG(host));
|
|
|
+ au_writel(0, HOST_CONFIG2(host));
|
|
|
+ au_sync();
|
|
|
|
|
|
tasklet_kill(&host->data_task);
|
|
|
tasklet_kill(&host->finish_task);
|
|
|
|
|
|
- del_timer_sync(&host->timer);
|
|
|
+#ifdef CONFIG_SOC_AU1200
|
|
|
+ au1xmmc_dbdma_shutdown(host);
|
|
|
+#endif
|
|
|
au1xmmc_set_power(host, 0);
|
|
|
|
|
|
- mmc_remove_host(host->mmc);
|
|
|
+ free_irq(host->irq, host);
|
|
|
+ iounmap((void *)host->iobase);
|
|
|
+ release_resource(host->ioarea);
|
|
|
+ kfree(host->ioarea);
|
|
|
|
|
|
- au1xxx_dbdma_chan_free(host->tx_chan);
|
|
|
- au1xxx_dbdma_chan_free(host->rx_chan);
|
|
|
-
|
|
|
- au_writel(0x0, HOST_ENABLE(host));
|
|
|
- au_sync();
|
|
|
+ mmc_free_host(mmc);
|
|
|
}
|
|
|
-
|
|
|
- free_irq(AU1100_SD_IRQ, 0);
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
@@ -1004,21 +1101,31 @@ static struct platform_driver au1xmmc_driver = {
|
|
|
|
|
|
static int __init au1xmmc_init(void)
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{
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+#ifdef CONFIG_SOC_AU1200
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+ /* DSCR_CMD0_ALWAYS has a stride of 32 bits, we need a stride
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+ * of 8 bits. And since devices are shared, we need to create
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+ * our own to avoid freaking out other devices.
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+ */
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+ memid = au1xxx_ddma_add_device(&au1xmmc_mem_dbdev);
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+ if (!memid)
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+ printk(KERN_ERR "au1xmmc: cannot add memory dbdma dev\n");
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+#endif
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return platform_driver_register(&au1xmmc_driver);
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}
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static void __exit au1xmmc_exit(void)
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{
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+#ifdef CONFIG_SOC_AU1200
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+ if (memid)
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+ au1xxx_ddma_del_device(memid);
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+#endif
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platform_driver_unregister(&au1xmmc_driver);
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}
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module_init(au1xmmc_init);
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module_exit(au1xmmc_exit);
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-#ifdef MODULE
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MODULE_AUTHOR("Advanced Micro Devices, Inc");
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MODULE_DESCRIPTION("MMC/SD driver for the Alchemy Au1XXX");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:au1xxx-mmc");
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-#endif
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-
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