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@@ -202,6 +202,8 @@
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#include <linux/slab.h>
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#include <linux/kprobes.h>
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+#include <asm/opcodes.h>
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+
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#include "kprobes.h"
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#include "kprobes-test.h"
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@@ -1050,65 +1052,9 @@ static int test_instance;
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static unsigned long test_check_cc(int cc, unsigned long cpsr)
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{
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- unsigned long temp;
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-
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- switch (cc) {
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- case 0x0: /* eq */
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- return cpsr & PSR_Z_BIT;
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-
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- case 0x1: /* ne */
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- return (~cpsr) & PSR_Z_BIT;
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-
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- case 0x2: /* cs */
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- return cpsr & PSR_C_BIT;
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-
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- case 0x3: /* cc */
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- return (~cpsr) & PSR_C_BIT;
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-
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- case 0x4: /* mi */
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- return cpsr & PSR_N_BIT;
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-
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- case 0x5: /* pl */
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- return (~cpsr) & PSR_N_BIT;
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-
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- case 0x6: /* vs */
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- return cpsr & PSR_V_BIT;
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-
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- case 0x7: /* vc */
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- return (~cpsr) & PSR_V_BIT;
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+ int ret = arm_check_condition(cc << 28, cpsr);
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- case 0x8: /* hi */
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- cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
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- return cpsr & PSR_C_BIT;
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-
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- case 0x9: /* ls */
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- cpsr &= ~(cpsr >> 1); /* PSR_C_BIT &= ~PSR_Z_BIT */
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- return (~cpsr) & PSR_C_BIT;
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-
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- case 0xa: /* ge */
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- cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
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- return (~cpsr) & PSR_N_BIT;
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-
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- case 0xb: /* lt */
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- cpsr ^= (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
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- return cpsr & PSR_N_BIT;
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-
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- case 0xc: /* gt */
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- temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
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- temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
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- return (~temp) & PSR_N_BIT;
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-
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- case 0xd: /* le */
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- temp = cpsr ^ (cpsr << 3); /* PSR_N_BIT ^= PSR_V_BIT */
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- temp |= (cpsr << 1); /* PSR_N_BIT |= PSR_Z_BIT */
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- return temp & PSR_N_BIT;
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-
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- case 0xe: /* al */
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- case 0xf: /* unconditional */
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- return true;
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- }
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- BUG();
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- return false;
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+ return (ret != ARM_OPCODE_CONDTEST_FAIL);
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}
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static int is_last_scenario;
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@@ -1128,7 +1074,9 @@ static unsigned long test_context_cpsr(int scenario)
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if (!test_case_is_thumb) {
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/* Testing ARM code */
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- probe_should_run = test_check_cc(current_instruction >> 28, cpsr) != 0;
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+ int cc = current_instruction >> 28;
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+
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+ probe_should_run = test_check_cc(cc, cpsr) != 0;
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if (scenario == 15)
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is_last_scenario = true;
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