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@@ -412,7 +412,7 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
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*/
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#define IDE_WAKEUP_DELAY (1*HZ)
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-static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif);
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+static int pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif);
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static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
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static void pmac_ide_selectproc(ide_drive_t *drive);
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static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
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@@ -1003,6 +1003,17 @@ pmac_ide_do_resume(ide_hwif_t *hwif)
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return 0;
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}
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+static const struct ide_port_info pmac_port_info = {
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+ .chipset = ide_pmac,
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+ .host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
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+ IDE_HFLAG_PIO_NO_DOWNGRADE |
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+ IDE_HFLAG_POST_SET_MODE |
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+ IDE_HFLAG_NO_DMA | /* no SFF-style DMA */
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+ IDE_HFLAG_UNMASK_IRQS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA2,
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+};
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+
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/*
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* Setup, register & probe an IDE channel driven by this driver, this is
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* called by one of the 2 probe functions (macio or PCI). Note that a channel
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@@ -1016,23 +1027,28 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
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struct device_node *np = pmif->node;
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const int *bidp;
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u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
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+ struct ide_port_info d = pmac_port_info;
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pmif->cable_80 = 0;
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pmif->broken_dma = pmif->broken_dma_warn = 0;
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- if (of_device_is_compatible(np, "shasta-ata"))
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+ if (of_device_is_compatible(np, "shasta-ata")) {
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pmif->kind = controller_sh_ata6;
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- else if (of_device_is_compatible(np, "kauai-ata"))
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+ d.udma_mask = ATA_UDMA6;
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+ } else if (of_device_is_compatible(np, "kauai-ata")) {
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pmif->kind = controller_un_ata6;
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- else if (of_device_is_compatible(np, "K2-UATA"))
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+ d.udma_mask = ATA_UDMA5;
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+ } else if (of_device_is_compatible(np, "K2-UATA")) {
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pmif->kind = controller_k2_ata6;
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- else if (of_device_is_compatible(np, "keylargo-ata")) {
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- if (strcmp(np->name, "ata-4") == 0)
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+ d.udma_mask = ATA_UDMA5;
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+ } else if (of_device_is_compatible(np, "keylargo-ata")) {
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+ if (strcmp(np->name, "ata-4") == 0) {
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pmif->kind = controller_kl_ata4;
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- else
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+ d.udma_mask = ATA_UDMA4;
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+ } else
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pmif->kind = controller_kl_ata3;
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- } else if (of_device_is_compatible(np, "heathrow-ata"))
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+ } else if (of_device_is_compatible(np, "heathrow-ata")) {
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pmif->kind = controller_heathrow;
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- else {
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+ } else {
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pmif->kind = controller_ohare;
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pmif->broken_dma = 1;
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}
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@@ -1101,19 +1117,10 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
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/* Tell common code _not_ to mess with resources */
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hwif->mmio = 1;
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hwif->hwif_data = pmif;
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- hw->chipset = ide_pmac;
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ide_init_port_hw(hwif, hw);
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hwif->noprobe = pmif->mediabay;
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hwif->hold = pmif->mediabay;
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hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
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- hwif->drives[0].unmask = 1;
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- hwif->drives[1].unmask = 1;
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- hwif->drives[0].autotune = IDE_TUNE_AUTO;
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- hwif->drives[1].autotune = IDE_TUNE_AUTO;
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- hwif->host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
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- IDE_HFLAG_PIO_NO_DOWNGRADE |
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- IDE_HFLAG_POST_SET_MODE;
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- hwif->pio_mask = ATA_PIO4;
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hwif->set_pio_mode = pmac_ide_set_pio_mode;
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if (pmif->kind == controller_un_ata6
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|| pmif->kind == controller_k2_ata6
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@@ -1133,14 +1140,16 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
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#endif /* CONFIG_PMAC_MEDIABAY */
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#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
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+ if (pmif->cable_80 == 0)
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+ d.udma_mask &= ATA_UDMA2;
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/* has a DBDMA controller channel */
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- if (pmif->dma_regs)
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- pmac_ide_setup_dma(pmif, hwif);
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-#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
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+ if (pmif->dma_regs == 0 || pmac_ide_setup_dma(pmif, hwif) < 0)
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+#endif
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+ d.udma_mask = d.mwdma_mask = 0;
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idx[0] = hwif->index;
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- ide_device_add(idx);
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+ ide_device_add(idx, &d);
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return 0;
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}
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@@ -1721,8 +1730,7 @@ pmac_ide_dma_lost_irq (ide_drive_t *drive)
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* Allocate the data structures needed for using DMA with an interface
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* and fill the proper list of functions pointers
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*/
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-static void __devinit
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-pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
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+static int __devinit pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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@@ -1730,7 +1738,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
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* DMA routines ...
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*/
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if (dev == NULL)
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- return;
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+ return -ENODEV;
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/*
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* Allocate space for the DBDMA commands.
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* The +2 is +1 for the stop command and +1 to allow for
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@@ -1743,7 +1751,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
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if (pmif->dma_table_cpu == NULL) {
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printk(KERN_ERR "%s: unable to allocate DMA command list\n",
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hwif->name);
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- return;
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+ return -ENOMEM;
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}
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hwif->sg_max_nents = MAX_DCMDS;
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@@ -1757,29 +1765,7 @@ pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
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hwif->dma_timeout = &ide_dma_timeout;
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hwif->dma_lost_irq = &pmac_ide_dma_lost_irq;
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- switch(pmif->kind) {
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- case controller_sh_ata6:
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- hwif->ultra_mask = pmif->cable_80 ? 0x7f : 0x07;
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- hwif->mwdma_mask = 0x07;
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- hwif->swdma_mask = 0x00;
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- break;
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- case controller_un_ata6:
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- case controller_k2_ata6:
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- hwif->ultra_mask = pmif->cable_80 ? 0x3f : 0x07;
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- hwif->mwdma_mask = 0x07;
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- hwif->swdma_mask = 0x00;
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- break;
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- case controller_kl_ata4:
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- hwif->ultra_mask = pmif->cable_80 ? 0x1f : 0x07;
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- hwif->mwdma_mask = 0x07;
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- hwif->swdma_mask = 0x00;
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- break;
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- default:
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- hwif->ultra_mask = 0x00;
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- hwif->mwdma_mask = 0x07;
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- hwif->swdma_mask = 0x00;
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- break;
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- }
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+ return 0;
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}
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#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
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