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@@ -105,41 +105,28 @@ static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F };
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static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F };
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static const u32 portirqmask[] = { IS_PORT_1, IS_PORT_2 };
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-/* Don't need to look at whole 16K.
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- * last interesting register is descriptor poll timer.
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- */
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-#define SKGE_REGS_LEN (29*128)
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-
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static int skge_get_regs_len(struct net_device *dev)
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{
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- return SKGE_REGS_LEN;
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+ return 0x4000;
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}
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/*
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- * Returns copy of control register region
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- * I/O region is divided into banks and certain regions are unreadable
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+ * Returns copy of whole control register region
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+ * Note: skip RAM address register because accessing it will
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+ * cause bus hangs!
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*/
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static void skge_get_regs(struct net_device *dev, struct ethtool_regs *regs,
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void *p)
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{
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const struct skge_port *skge = netdev_priv(dev);
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- unsigned long offs;
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const void __iomem *io = skge->hw->regs;
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- static const unsigned long bankmap
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- = (1<<0) | (1<<2) | (1<<8) | (1<<9)
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- | (1<<12) | (1<<13) | (1<<14) | (1<<15) | (1<<16)
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- | (1<<17) | (1<<20) | (1<<21) | (1<<22) | (1<<23)
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- | (1<<24) | (1<<25) | (1<<26) | (1<<27) | (1<<28);
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regs->version = 1;
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- for (offs = 0; offs < regs->len; offs += 128) {
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- u32 len = min_t(u32, 128, regs->len - offs);
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+ memset(p, 0, regs->len);
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+ memcpy_fromio(p, io, B3_RAM_ADDR);
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- if (bankmap & (1<<(offs/128)))
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- memcpy_fromio(p + offs, io + offs, len);
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- else
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- memset(p + offs, 0, len);
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- }
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+ memcpy_fromio(p + B3_RI_WTO_R1, io + B3_RI_WTO_R1,
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+ regs->len - B3_RI_WTO_R1);
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}
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/* Wake on Lan only supported on Yukon chps with rev 1 or above */
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