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@@ -26,6 +26,7 @@ EXPORT_PER_CPU_SYMBOL(__cpu_data);
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struct cpu_info {
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int psr_vers;
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const char *name;
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+ const char *pmu_name;
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};
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struct fpu_info {
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@@ -45,6 +46,9 @@ struct manufacturer_info {
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#define CPU(ver, _name) \
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{ .psr_vers = ver, .name = _name }
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+#define CPU_PMU(ver, _name, _pmu_name) \
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+{ .psr_vers = ver, .name = _name, .pmu_name = _pmu_name }
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+
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#define FPU(ver, _name) \
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{ .fp_vers = ver, .name = _name }
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@@ -183,10 +187,10 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
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},{
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0x17,
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.cpu_info = {
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- CPU(0x10, "TI UltraSparc I (SpitFire)"),
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- CPU(0x11, "TI UltraSparc II (BlackBird)"),
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- CPU(0x12, "TI UltraSparc IIi (Sabre)"),
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- CPU(0x13, "TI UltraSparc IIe (Hummingbird)"),
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+ CPU_PMU(0x10, "TI UltraSparc I (SpitFire)", "ultra12"),
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+ CPU_PMU(0x11, "TI UltraSparc II (BlackBird)", "ultra12"),
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+ CPU_PMU(0x12, "TI UltraSparc IIi (Sabre)", "ultra12"),
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+ CPU_PMU(0x13, "TI UltraSparc IIe (Hummingbird)", "ultra12"),
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CPU(-1, NULL)
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},
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.fpu_info = {
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@@ -199,7 +203,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
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},{
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0x22,
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.cpu_info = {
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- CPU(0x10, "TI UltraSparc I (SpitFire)"),
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+ CPU_PMU(0x10, "TI UltraSparc I (SpitFire)", "ultra12"),
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CPU(-1, NULL)
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},
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.fpu_info = {
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@@ -209,12 +213,12 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
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},{
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0x3e,
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.cpu_info = {
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- CPU(0x14, "TI UltraSparc III (Cheetah)"),
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- CPU(0x15, "TI UltraSparc III+ (Cheetah+)"),
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- CPU(0x16, "TI UltraSparc IIIi (Jalapeno)"),
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- CPU(0x18, "TI UltraSparc IV (Jaguar)"),
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- CPU(0x19, "TI UltraSparc IV+ (Panther)"),
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- CPU(0x22, "TI UltraSparc IIIi+ (Serrano)"),
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+ CPU_PMU(0x14, "TI UltraSparc III (Cheetah)", "ultra3"),
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+ CPU_PMU(0x15, "TI UltraSparc III+ (Cheetah+)", "ultra3+"),
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+ CPU_PMU(0x16, "TI UltraSparc IIIi (Jalapeno)", "ultra3i"),
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+ CPU_PMU(0x18, "TI UltraSparc IV (Jaguar)", "ultra3+"),
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+ CPU_PMU(0x19, "TI UltraSparc IV+ (Panther)", "ultra4+"),
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+ CPU_PMU(0x22, "TI UltraSparc IIIi+ (Serrano)", "ultra3i"),
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CPU(-1, NULL)
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},
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.fpu_info = {
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@@ -234,6 +238,7 @@ static const struct manufacturer_info __initconst manufacturer_info[] = {
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const char *sparc_cpu_type;
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const char *sparc_fpu_type;
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+const char *sparc_pmu_type;
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unsigned int fsr_storage;
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@@ -244,6 +249,7 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
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sparc_cpu_type = NULL;
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sparc_fpu_type = NULL;
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+ sparc_pmu_type = NULL;
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manuf = NULL;
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for (i = 0; i < ARRAY_SIZE(manufacturer_info); i++)
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@@ -263,6 +269,7 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
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{
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if (cpu->psr_vers == psr_vers) {
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sparc_cpu_type = cpu->name;
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+ sparc_pmu_type = cpu->pmu_name;
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sparc_fpu_type = "No FPU";
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break;
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}
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@@ -290,6 +297,8 @@ static void set_cpu_and_fpu(int psr_impl, int psr_vers, int fpu_vers)
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psr_impl, fpu_vers);
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sparc_fpu_type = "Unknown FPU";
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}
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+ if (sparc_pmu_type == NULL)
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+ sparc_pmu_type = "Unknown PMU";
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}
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#ifdef CONFIG_SPARC32
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@@ -315,11 +324,13 @@ static void __init sun4v_cpu_probe(void)
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case SUN4V_CHIP_NIAGARA1:
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sparc_cpu_type = "UltraSparc T1 (Niagara)";
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sparc_fpu_type = "UltraSparc T1 integrated FPU";
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+ sparc_pmu_type = "niagara";
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break;
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case SUN4V_CHIP_NIAGARA2:
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sparc_cpu_type = "UltraSparc T2 (Niagara2)";
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sparc_fpu_type = "UltraSparc T2 integrated FPU";
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+ sparc_pmu_type = "niagara2";
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break;
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default:
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