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@@ -470,16 +470,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
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static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
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{
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#define ATH_ALLOC_BANK(bank, size) do { \
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- bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
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- if (!bank) { \
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- ath_err(common, "Cannot allocate RF banks\n"); \
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- return -ENOMEM; \
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- } \
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+ bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
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+ if (!bank) \
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+ goto error; \
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} while (0);
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struct ath_common *common = ath9k_hw_common(ah);
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- BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
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+ if (AR_SREV_9280_20_OR_LATER(ah))
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+ return 0;
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ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
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ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
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@@ -492,35 +491,12 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
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return 0;
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#undef ATH_ALLOC_BANK
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+error:
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+ ath_err(common, "Cannot allocate RF banks\n");
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+ return -ENOMEM;
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}
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-/**
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- * ar5008_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
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- * @ah: atheros hardware struture
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- * For the external AR2133/AR5133 radios banks.
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- */
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-static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
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-{
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-#define ATH_FREE_BANK(bank) do { \
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- kfree(bank); \
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- bank = NULL; \
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- } while (0);
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-
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- BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
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-
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- ATH_FREE_BANK(ah->analogBank0Data);
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- ATH_FREE_BANK(ah->analogBank1Data);
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- ATH_FREE_BANK(ah->analogBank2Data);
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- ATH_FREE_BANK(ah->analogBank3Data);
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- ATH_FREE_BANK(ah->analogBank6Data);
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- ATH_FREE_BANK(ah->analogBank6TPCData);
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- ATH_FREE_BANK(ah->analogBank7Data);
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- ATH_FREE_BANK(ah->bank6Temp);
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-
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-#undef ATH_FREE_BANK
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-}
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-
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/* *
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* ar5008_hw_set_rf_regs - programs rf registers based on EEPROM
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* @ah: atheros hardware structure
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@@ -1380,7 +1356,7 @@ static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
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conf->radar_inband = 8;
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}
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-void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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+int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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{
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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static const u32 ar5416_cca_regs[6] = {
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@@ -1391,12 +1367,15 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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AR_PHY_CH1_EXT_CCA,
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AR_PHY_CH2_EXT_CCA
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};
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+ int ret;
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+
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+ ret = ar5008_hw_rf_alloc_ext_banks(ah);
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+ if (ret)
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+ return ret;
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priv_ops->rf_set_freq = ar5008_hw_set_channel;
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priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
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- priv_ops->rf_alloc_ext_banks = ar5008_hw_rf_alloc_ext_banks;
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- priv_ops->rf_free_ext_banks = ar5008_hw_rf_free_ext_banks;
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priv_ops->set_rf_regs = ar5008_hw_set_rf_regs;
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priv_ops->set_channel_regs = ar5008_hw_set_channel_regs;
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priv_ops->init_bb = ar5008_hw_init_bb;
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@@ -1421,4 +1400,5 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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ar5008_hw_set_nf_limits(ah);
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ar5008_hw_set_radar_conf(ah);
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memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs));
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+ return 0;
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}
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