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@@ -1015,6 +1015,189 @@ static u32 ar5008_hw_compute_pll_control(struct ath_hw *ah,
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return pll;
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return pll;
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}
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}
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+static bool ar5008_hw_ani_control(struct ath_hw *ah,
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+ enum ath9k_ani_cmd cmd, int param)
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+{
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+ struct ar5416AniState *aniState = ah->curani;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+
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+ switch (cmd & ah->ani_function) {
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+ case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{
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+ u32 level = param;
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+
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+ if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
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+ ath_print(common, ATH_DBG_ANI,
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+ "level out of range (%u > %u)\n",
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+ level,
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+ (unsigned)ARRAY_SIZE(ah->totalSizeDesired));
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+ return false;
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+ }
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+
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+ REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
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+ AR_PHY_DESIRED_SZ_TOT_DES,
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+ ah->totalSizeDesired[level]);
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+ REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
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+ AR_PHY_AGC_CTL1_COARSE_LOW,
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+ ah->coarse_low[level]);
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+ REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
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+ AR_PHY_AGC_CTL1_COARSE_HIGH,
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+ ah->coarse_high[level]);
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+ REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
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+ AR_PHY_FIND_SIG_FIRPWR,
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+ ah->firpwr[level]);
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+
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+ if (level > aniState->noiseImmunityLevel)
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+ ah->stats.ast_ani_niup++;
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+ else if (level < aniState->noiseImmunityLevel)
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+ ah->stats.ast_ani_nidown++;
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+ aniState->noiseImmunityLevel = level;
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+ break;
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+ }
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+ case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
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+ const int m1ThreshLow[] = { 127, 50 };
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+ const int m2ThreshLow[] = { 127, 40 };
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+ const int m1Thresh[] = { 127, 0x4d };
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+ const int m2Thresh[] = { 127, 0x40 };
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+ const int m2CountThr[] = { 31, 16 };
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+ const int m2CountThrLow[] = { 63, 48 };
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+ u32 on = param ? 1 : 0;
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+
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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+ AR_PHY_SFCORR_LOW_M1_THRESH_LOW,
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+ m1ThreshLow[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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+ AR_PHY_SFCORR_LOW_M2_THRESH_LOW,
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+ m2ThreshLow[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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+ AR_PHY_SFCORR_M1_THRESH,
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+ m1Thresh[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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+ AR_PHY_SFCORR_M2_THRESH,
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+ m2Thresh[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR,
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+ AR_PHY_SFCORR_M2COUNT_THR,
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+ m2CountThr[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
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+ AR_PHY_SFCORR_LOW_M2COUNT_THR_LOW,
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+ m2CountThrLow[on]);
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+
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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+ AR_PHY_SFCORR_EXT_M1_THRESH_LOW,
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+ m1ThreshLow[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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+ AR_PHY_SFCORR_EXT_M2_THRESH_LOW,
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+ m2ThreshLow[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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+ AR_PHY_SFCORR_EXT_M1_THRESH,
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+ m1Thresh[on]);
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+ REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
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+ AR_PHY_SFCORR_EXT_M2_THRESH,
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+ m2Thresh[on]);
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+
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+ if (on)
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+ REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,
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+ AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
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+ else
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+ REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,
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+ AR_PHY_SFCORR_LOW_USE_SELF_CORR_LOW);
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+
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+ if (!on != aniState->ofdmWeakSigDetectOff) {
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+ if (on)
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+ ah->stats.ast_ani_ofdmon++;
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+ else
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+ ah->stats.ast_ani_ofdmoff++;
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+ aniState->ofdmWeakSigDetectOff = !on;
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+ }
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+ break;
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+ }
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+ case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
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+ const int weakSigThrCck[] = { 8, 6 };
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+ u32 high = param ? 1 : 0;
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+
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+ REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
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+ AR_PHY_CCK_DETECT_WEAK_SIG_THR_CCK,
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+ weakSigThrCck[high]);
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+ if (high != aniState->cckWeakSigThreshold) {
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+ if (high)
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+ ah->stats.ast_ani_cckhigh++;
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+ else
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+ ah->stats.ast_ani_ccklow++;
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+ aniState->cckWeakSigThreshold = high;
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+ }
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+ break;
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+ }
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+ case ATH9K_ANI_FIRSTEP_LEVEL:{
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+ const int firstep[] = { 0, 4, 8 };
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+ u32 level = param;
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+
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+ if (level >= ARRAY_SIZE(firstep)) {
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+ ath_print(common, ATH_DBG_ANI,
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+ "level out of range (%u > %u)\n",
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+ level,
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+ (unsigned) ARRAY_SIZE(firstep));
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+ return false;
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+ }
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+ REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
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+ AR_PHY_FIND_SIG_FIRSTEP,
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+ firstep[level]);
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+ if (level > aniState->firstepLevel)
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+ ah->stats.ast_ani_stepup++;
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+ else if (level < aniState->firstepLevel)
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+ ah->stats.ast_ani_stepdown++;
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+ aniState->firstepLevel = level;
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+ break;
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+ }
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+ case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
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+ const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
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+ u32 level = param;
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+
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+ if (level >= ARRAY_SIZE(cycpwrThr1)) {
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+ ath_print(common, ATH_DBG_ANI,
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+ "level out of range (%u > %u)\n",
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+ level,
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+ (unsigned) ARRAY_SIZE(cycpwrThr1));
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+ return false;
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+ }
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+ REG_RMW_FIELD(ah, AR_PHY_TIMING5,
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+ AR_PHY_TIMING5_CYCPWR_THR1,
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+ cycpwrThr1[level]);
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+ if (level > aniState->spurImmunityLevel)
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+ ah->stats.ast_ani_spurup++;
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+ else if (level < aniState->spurImmunityLevel)
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+ ah->stats.ast_ani_spurdown++;
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+ aniState->spurImmunityLevel = level;
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+ break;
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+ }
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+ case ATH9K_ANI_PRESENT:
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+ break;
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+ default:
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+ ath_print(common, ATH_DBG_ANI,
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+ "invalid cmd %u\n", cmd);
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+ return false;
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+ }
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+
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+ ath_print(common, ATH_DBG_ANI, "ANI parameters:\n");
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+ ath_print(common, ATH_DBG_ANI,
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+ "noiseImmunityLevel=%d, spurImmunityLevel=%d, "
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+ "ofdmWeakSigDetectOff=%d\n",
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+ aniState->noiseImmunityLevel,
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+ aniState->spurImmunityLevel,
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+ !aniState->ofdmWeakSigDetectOff);
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+ ath_print(common, ATH_DBG_ANI,
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+ "cckWeakSigThreshold=%d, "
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+ "firstepLevel=%d, listenTime=%d\n",
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+ aniState->cckWeakSigThreshold,
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+ aniState->firstepLevel,
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+ aniState->listenTime);
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+ ath_print(common, ATH_DBG_ANI,
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+ "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
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+ aniState->cycleCount,
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+ aniState->ofdmPhyErrCount,
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+ aniState->cckPhyErrCount);
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+
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+ return true;
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+}
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+
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void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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{
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{
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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@@ -1036,6 +1219,7 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
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priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
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priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
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priv_ops->restore_chainmask = ar5008_restore_chainmask;
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priv_ops->restore_chainmask = ar5008_restore_chainmask;
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priv_ops->set_diversity = ar5008_set_diversity;
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priv_ops->set_diversity = ar5008_set_diversity;
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+ priv_ops->ani_control = ar5008_hw_ani_control;
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if (AR_SREV_9100(ah))
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if (AR_SREV_9100(ah))
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priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
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priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
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