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@@ -164,28 +164,6 @@ struct piix_host_priv {
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void __iomem *sidpr;
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};
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-static int piix_init_one(struct pci_dev *pdev,
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- const struct pci_device_id *ent);
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-static void piix_remove_one(struct pci_dev *pdev);
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-static int piix_pata_prereset(struct ata_link *link, unsigned long deadline);
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-static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev);
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-static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev);
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-static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev);
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-static int ich_pata_cable_detect(struct ata_port *ap);
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-static u8 piix_vmw_bmdma_status(struct ata_port *ap);
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-static int piix_sidpr_scr_read(struct ata_link *link,
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- unsigned int reg, u32 *val);
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-static int piix_sidpr_scr_write(struct ata_link *link,
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- unsigned int reg, u32 val);
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-static int piix_sidpr_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
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- unsigned hints);
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-static bool piix_irq_check(struct ata_port *ap);
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-static int piix_port_start(struct ata_port *ap);
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-#ifdef CONFIG_PM
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-static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
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-static int piix_pci_device_resume(struct pci_dev *pdev);
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-#endif
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-
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static unsigned int in_module_init = 1;
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static const struct pci_device_id piix_pci_tbl[] = {
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@@ -342,64 +320,6 @@ static const struct pci_device_id piix_pci_tbl[] = {
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{ } /* terminate list */
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};
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-static struct pci_driver piix_pci_driver = {
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- .name = DRV_NAME,
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- .id_table = piix_pci_tbl,
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- .probe = piix_init_one,
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- .remove = piix_remove_one,
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-#ifdef CONFIG_PM
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- .suspend = piix_pci_device_suspend,
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- .resume = piix_pci_device_resume,
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-#endif
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-};
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-
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-static struct scsi_host_template piix_sht = {
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- ATA_BMDMA_SHT(DRV_NAME),
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-};
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-
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-static struct ata_port_operations piix_sata_ops = {
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- .inherits = &ata_bmdma32_port_ops,
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- .sff_irq_check = piix_irq_check,
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- .port_start = piix_port_start,
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-};
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-
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-static struct ata_port_operations piix_pata_ops = {
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- .inherits = &piix_sata_ops,
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- .cable_detect = ata_cable_40wire,
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- .set_piomode = piix_set_piomode,
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- .set_dmamode = piix_set_dmamode,
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- .prereset = piix_pata_prereset,
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-};
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-
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-static struct ata_port_operations piix_vmw_ops = {
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- .inherits = &piix_pata_ops,
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- .bmdma_status = piix_vmw_bmdma_status,
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-};
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-
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-static struct ata_port_operations ich_pata_ops = {
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- .inherits = &piix_pata_ops,
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- .cable_detect = ich_pata_cable_detect,
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- .set_dmamode = ich_set_dmamode,
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-};
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-
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-static struct device_attribute *piix_sidpr_shost_attrs[] = {
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- &dev_attr_link_power_management_policy,
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- NULL
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-};
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-
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-static struct scsi_host_template piix_sidpr_sht = {
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- ATA_BMDMA_SHT(DRV_NAME),
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- .shost_attrs = piix_sidpr_shost_attrs,
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-};
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-
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-static struct ata_port_operations piix_sidpr_sata_ops = {
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- .inherits = &piix_sata_ops,
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- .hardreset = sata_std_hardreset,
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- .scr_read = piix_sidpr_scr_read,
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- .scr_write = piix_sidpr_scr_write,
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- .set_lpm = piix_sidpr_set_lpm,
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-};
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-
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static const struct piix_map_db ich5_map_db = {
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.mask = 0x7,
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.port_enable = 0x3,
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@@ -504,147 +424,6 @@ static const struct piix_map_db *piix_map_db_table[] = {
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[ich8_sata_snb] = &ich8_map_db,
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};
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-static struct ata_port_info piix_port_info[] = {
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- [piix_pata_mwdma] = /* PIIX3 MWDMA only */
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- {
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- .flags = PIIX_PATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
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- .port_ops = &piix_pata_ops,
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- },
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-
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- [piix_pata_33] = /* PIIX4 at 33MHz */
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- {
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- .flags = PIIX_PATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
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- .udma_mask = ATA_UDMA2,
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- .port_ops = &piix_pata_ops,
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- },
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-
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- [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/
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- {
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- .flags = PIIX_PATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY, /* Check: maybe MWDMA0 is ok */
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- .udma_mask = ATA_UDMA2,
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- .port_ops = &ich_pata_ops,
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- },
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-
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- [ich_pata_66] = /* ICH controllers up to 66MHz */
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- {
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- .flags = PIIX_PATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY, /* MWDMA0 is broken on chip */
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- .udma_mask = ATA_UDMA4,
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- .port_ops = &ich_pata_ops,
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- },
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-
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- [ich_pata_100] =
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- {
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- .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY,
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- .udma_mask = ATA_UDMA5,
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- .port_ops = &ich_pata_ops,
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- },
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-
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- [ich_pata_100_nomwdma1] =
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- {
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- .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2_ONLY,
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- .udma_mask = ATA_UDMA5,
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- .port_ops = &ich_pata_ops,
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- },
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-
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- [ich5_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [ich6_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [ich6m_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [ich8_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [ich8_2port_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [tolapai_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [ich8m_apple_sata] =
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- {
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- .flags = PIIX_SATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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- [piix_pata_vmw] =
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- {
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- .flags = PIIX_PATA_FLAGS,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
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- .udma_mask = ATA_UDMA2,
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- .port_ops = &piix_vmw_ops,
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- },
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-
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- /*
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- * some Sandybridge chipsets have broken 32 mode up to now,
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- * see https://bugzilla.kernel.org/show_bug.cgi?id=40592
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- */
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- [ich8_sata_snb] =
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- {
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- .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
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- .pio_mask = ATA_PIO4,
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- .mwdma_mask = ATA_MWDMA2,
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- .udma_mask = ATA_UDMA6,
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- .port_ops = &piix_sata_ops,
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- },
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-
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-};
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-
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static struct pci_bits piix_enable_bits[] = {
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{ 0x41U, 1U, 0x80UL, 0x80UL }, /* port 0 */
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{ 0x43U, 1U, 0x80UL, 0x80UL }, /* port 1 */
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@@ -1261,6 +1040,193 @@ static u8 piix_vmw_bmdma_status(struct ata_port *ap)
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return ata_bmdma_status(ap) & ~ATA_DMA_ERR;
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}
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+static struct scsi_host_template piix_sht = {
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+ ATA_BMDMA_SHT(DRV_NAME),
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+};
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+
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+static struct ata_port_operations piix_sata_ops = {
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+ .inherits = &ata_bmdma32_port_ops,
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+ .sff_irq_check = piix_irq_check,
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+ .port_start = piix_port_start,
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+};
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+
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+static struct ata_port_operations piix_pata_ops = {
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+ .inherits = &piix_sata_ops,
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+ .cable_detect = ata_cable_40wire,
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+ .set_piomode = piix_set_piomode,
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+ .set_dmamode = piix_set_dmamode,
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+ .prereset = piix_pata_prereset,
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+};
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+
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+static struct ata_port_operations piix_vmw_ops = {
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+ .inherits = &piix_pata_ops,
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+ .bmdma_status = piix_vmw_bmdma_status,
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+};
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+
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+static struct ata_port_operations ich_pata_ops = {
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+ .inherits = &piix_pata_ops,
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+ .cable_detect = ich_pata_cable_detect,
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+ .set_dmamode = ich_set_dmamode,
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+};
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+
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+static struct device_attribute *piix_sidpr_shost_attrs[] = {
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+ &dev_attr_link_power_management_policy,
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+ NULL
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+};
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+
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+static struct scsi_host_template piix_sidpr_sht = {
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+ ATA_BMDMA_SHT(DRV_NAME),
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+ .shost_attrs = piix_sidpr_shost_attrs,
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+};
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+
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+static struct ata_port_operations piix_sidpr_sata_ops = {
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+ .inherits = &piix_sata_ops,
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+ .hardreset = sata_std_hardreset,
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+ .scr_read = piix_sidpr_scr_read,
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+ .scr_write = piix_sidpr_scr_write,
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+ .set_lpm = piix_sidpr_set_lpm,
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+};
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+
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+static struct ata_port_info piix_port_info[] = {
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+ [piix_pata_mwdma] = /* PIIX3 MWDMA only */
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+ {
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+ .flags = PIIX_PATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
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+ .port_ops = &piix_pata_ops,
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+ },
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+
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+ [piix_pata_33] = /* PIIX4 at 33MHz */
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+ {
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+ .flags = PIIX_PATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
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+ .udma_mask = ATA_UDMA2,
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+ .port_ops = &piix_pata_ops,
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+ },
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+
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+ [ich_pata_33] = /* ICH0 - ICH at 33Mhz*/
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+ {
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+ .flags = PIIX_PATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA12_ONLY, /* Check: maybe MWDMA0 is ok */
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+ .udma_mask = ATA_UDMA2,
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+ .port_ops = &ich_pata_ops,
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+ },
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+
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+ [ich_pata_66] = /* ICH controllers up to 66MHz */
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+ {
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+ .flags = PIIX_PATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA12_ONLY, /* MWDMA0 is broken on chip */
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+ .udma_mask = ATA_UDMA4,
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+ .port_ops = &ich_pata_ops,
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+ },
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+
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+ [ich_pata_100] =
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+ {
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+ .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA12_ONLY,
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+ .udma_mask = ATA_UDMA5,
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+ .port_ops = &ich_pata_ops,
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+ },
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+
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+ [ich_pata_100_nomwdma1] =
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+ {
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+ .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA2_ONLY,
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+ .udma_mask = ATA_UDMA5,
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+ .port_ops = &ich_pata_ops,
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+ },
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+
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+ [ich5_sata] =
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+ {
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+ .flags = PIIX_SATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA2,
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &piix_sata_ops,
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+ },
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+
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+ [ich6_sata] =
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+ {
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+ .flags = PIIX_SATA_FLAGS,
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+ .pio_mask = ATA_PIO4,
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+ .mwdma_mask = ATA_MWDMA2,
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+ .udma_mask = ATA_UDMA6,
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+ .port_ops = &piix_sata_ops,
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+ },
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+
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+ [ich6m_sata] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ [ich8_sata] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ [ich8_2port_sata] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ [tolapai_sata] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ [ich8m_apple_sata] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ [piix_pata_vmw] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_PATA_FLAGS,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA12_ONLY, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
|
|
|
+ .udma_mask = ATA_UDMA2,
|
|
|
+ .port_ops = &piix_vmw_ops,
|
|
|
+ },
|
|
|
+
|
|
|
+ /*
|
|
|
+ * some Sandybridge chipsets have broken 32 mode up to now,
|
|
|
+ * see https://bugzilla.kernel.org/show_bug.cgi?id=40592
|
|
|
+ */
|
|
|
+ [ich8_sata_snb] =
|
|
|
+ {
|
|
|
+ .flags = PIIX_SATA_FLAGS | PIIX_FLAG_SIDPR | PIIX_FLAG_PIO16,
|
|
|
+ .pio_mask = ATA_PIO4,
|
|
|
+ .mwdma_mask = ATA_MWDMA2,
|
|
|
+ .udma_mask = ATA_UDMA6,
|
|
|
+ .port_ops = &piix_sata_ops,
|
|
|
+ },
|
|
|
+};
|
|
|
+
|
|
|
#define AHCI_PCI_BAR 5
|
|
|
#define AHCI_GLOBAL_CTL 0x04
|
|
|
#define AHCI_ENABLE (1 << 31)
|
|
@@ -1585,12 +1551,31 @@ static void piix_ignore_devices_quirk(struct ata_host *host)
|
|
|
},
|
|
|
{ } /* terminate list */
|
|
|
};
|
|
|
- const struct dmi_system_id *dmi = dmi_first_match(ignore_hyperv);
|
|
|
+ static const struct dmi_system_id allow_virtual_pc[] = {
|
|
|
+ {
|
|
|
+ /* In MS Virtual PC guests the DMI ident is nearly
|
|
|
+ * identical to a Hyper-V guest. One difference is the
|
|
|
+ * product version which is used here to identify
|
|
|
+ * a Virtual PC guest. This entry allows ata_piix to
|
|
|
+ * drive the emulated hardware.
|
|
|
+ */
|
|
|
+ .ident = "MS Virtual PC 2007",
|
|
|
+ .matches = {
|
|
|
+ DMI_MATCH(DMI_SYS_VENDOR,
|
|
|
+ "Microsoft Corporation"),
|
|
|
+ DMI_MATCH(DMI_PRODUCT_NAME, "Virtual Machine"),
|
|
|
+ DMI_MATCH(DMI_PRODUCT_VERSION, "VS2005R2"),
|
|
|
+ },
|
|
|
+ },
|
|
|
+ { } /* terminate list */
|
|
|
+ };
|
|
|
+ const struct dmi_system_id *ignore = dmi_first_match(ignore_hyperv);
|
|
|
+ const struct dmi_system_id *allow = dmi_first_match(allow_virtual_pc);
|
|
|
|
|
|
- if (dmi && prefer_ms_hyperv) {
|
|
|
+ if (ignore && !allow && prefer_ms_hyperv) {
|
|
|
host->flags |= ATA_HOST_IGNORE_ATA;
|
|
|
dev_info(host->dev, "%s detected, ATA device ignore set\n",
|
|
|
- dmi->ident);
|
|
|
+ ignore->ident);
|
|
|
}
|
|
|
#endif
|
|
|
}
|
|
@@ -1727,6 +1712,17 @@ static void piix_remove_one(struct pci_dev *pdev)
|
|
|
ata_pci_remove_one(pdev);
|
|
|
}
|
|
|
|
|
|
+static struct pci_driver piix_pci_driver = {
|
|
|
+ .name = DRV_NAME,
|
|
|
+ .id_table = piix_pci_tbl,
|
|
|
+ .probe = piix_init_one,
|
|
|
+ .remove = piix_remove_one,
|
|
|
+#ifdef CONFIG_PM
|
|
|
+ .suspend = piix_pci_device_suspend,
|
|
|
+ .resume = piix_pci_device_resume,
|
|
|
+#endif
|
|
|
+};
|
|
|
+
|
|
|
static int __init piix_init(void)
|
|
|
{
|
|
|
int rc;
|