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@@ -5500,9 +5500,38 @@ void intel_gt_init(struct drm_device *dev)
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if (IS_VALLEYVIEW(dev)) {
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dev_priv->gt.force_wake_get = vlv_force_wake_get;
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dev_priv->gt.force_wake_put = vlv_force_wake_put;
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- } else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
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+ } else if (IS_HASWELL(dev)) {
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dev_priv->gt.force_wake_get = __gen6_gt_force_wake_mt_get;
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dev_priv->gt.force_wake_put = __gen6_gt_force_wake_mt_put;
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+ } else if (IS_IVYBRIDGE(dev)) {
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+ u32 ecobus;
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+
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+ /* IVB configs may use multi-threaded forcewake */
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+
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+ /* A small trick here - if the bios hasn't configured
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+ * MT forcewake, and if the device is in RC6, then
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+ * force_wake_mt_get will not wake the device and the
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+ * ECOBUS read will return zero. Which will be
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+ * (correctly) interpreted by the test below as MT
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+ * forcewake being disabled.
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+ */
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+ mutex_lock(&dev->struct_mutex);
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+ __gen6_gt_force_wake_mt_get(dev_priv);
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+ ecobus = I915_READ_NOTRACE(ECOBUS);
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+ __gen6_gt_force_wake_mt_put(dev_priv);
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+ mutex_unlock(&dev->struct_mutex);
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+
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+ if (ecobus & FORCEWAKE_MT_ENABLE) {
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+ dev_priv->gt.force_wake_get =
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+ __gen6_gt_force_wake_mt_get;
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+ dev_priv->gt.force_wake_put =
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+ __gen6_gt_force_wake_mt_put;
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+ } else {
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+ DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
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+ DRM_INFO("when using vblank-synced partial screen updates.\n");
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+ dev_priv->gt.force_wake_get = __gen6_gt_force_wake_get;
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+ dev_priv->gt.force_wake_put = __gen6_gt_force_wake_put;
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+ }
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} else if (IS_GEN6(dev)) {
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dev_priv->gt.force_wake_get = __gen6_gt_force_wake_get;
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dev_priv->gt.force_wake_put = __gen6_gt_force_wake_put;
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