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@@ -48,6 +48,8 @@ struct sdhci_of_host {
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#define ESDHC_CLOCK_HCKEN 0x00000002
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#define ESDHC_CLOCK_IPGEN 0x00000001
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+#define ESDHC_HOST_CONTROL_RES 0x05
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+
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static u32 esdhc_readl(struct sdhci_host *host, int reg)
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{
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return in_be32(host->ioaddr + reg);
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@@ -109,6 +111,10 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
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int base = reg & ~0x3;
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int shift = (reg & 0x3) * 8;
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+ /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
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+ if (reg == SDHCI_HOST_CONTROL)
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+ val &= ~ESDHC_HOST_CONTROL_RES;
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+
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clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
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}
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