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@@ -289,7 +289,7 @@ static u8 bnx2x_emac_enable(struct link_params *params,
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/* pause enable/disable */
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/* pause enable/disable */
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bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE,
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bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE,
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EMAC_RX_MODE_FLOW_EN);
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EMAC_RX_MODE_FLOW_EN);
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- if (vars->flow_ctrl & FLOW_CTRL_RX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
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bnx2x_bits_en(bp, emac_base +
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bnx2x_bits_en(bp, emac_base +
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EMAC_REG_EMAC_RX_MODE,
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EMAC_REG_EMAC_RX_MODE,
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EMAC_RX_MODE_FLOW_EN);
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EMAC_RX_MODE_FLOW_EN);
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@@ -297,7 +297,7 @@ static u8 bnx2x_emac_enable(struct link_params *params,
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bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_TX_MODE,
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bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_TX_MODE,
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(EMAC_TX_MODE_EXT_PAUSE_EN |
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(EMAC_TX_MODE_EXT_PAUSE_EN |
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EMAC_TX_MODE_FLOW_EN));
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EMAC_TX_MODE_FLOW_EN));
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- if (vars->flow_ctrl & FLOW_CTRL_TX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
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bnx2x_bits_en(bp, emac_base +
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bnx2x_bits_en(bp, emac_base +
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EMAC_REG_EMAC_TX_MODE,
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EMAC_REG_EMAC_TX_MODE,
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(EMAC_TX_MODE_EXT_PAUSE_EN |
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(EMAC_TX_MODE_EXT_PAUSE_EN |
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@@ -333,7 +333,7 @@ static u8 bnx2x_emac_enable(struct link_params *params,
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/* enable the NIG in/out to the emac */
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/* enable the NIG in/out to the emac */
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REG_WR(bp, NIG_REG_EMAC0_IN_EN + port*4, 0x1);
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REG_WR(bp, NIG_REG_EMAC0_IN_EN + port*4, 0x1);
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val = 0;
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val = 0;
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- if (vars->flow_ctrl & FLOW_CTRL_TX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
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val = 1;
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val = 1;
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REG_WR(bp, NIG_REG_EMAC0_PAUSE_OUT_EN + port*4, val);
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REG_WR(bp, NIG_REG_EMAC0_PAUSE_OUT_EN + port*4, val);
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@@ -396,7 +396,7 @@ static u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars,
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/* tx control */
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/* tx control */
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val = 0xc0;
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val = 0xc0;
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- if (vars->flow_ctrl & FLOW_CTRL_TX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
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val |= 0x800000;
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val |= 0x800000;
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wb_data[0] = val;
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wb_data[0] = val;
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wb_data[1] = 0;
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wb_data[1] = 0;
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@@ -423,7 +423,7 @@ static u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars,
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/* rx control set to don't strip crc */
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/* rx control set to don't strip crc */
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val = 0x14;
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val = 0x14;
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- if (vars->flow_ctrl & FLOW_CTRL_RX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
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val |= 0x20;
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val |= 0x20;
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wb_data[0] = val;
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wb_data[0] = val;
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wb_data[1] = 0;
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wb_data[1] = 0;
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@@ -460,7 +460,7 @@ static u8 bnx2x_bmac_enable(struct link_params *params, struct link_vars *vars,
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REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 0x0);
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REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 0x0);
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REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + port*4, 0x0);
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REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + port*4, 0x0);
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val = 0;
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val = 0;
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- if (vars->flow_ctrl & FLOW_CTRL_TX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
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val = 1;
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val = 1;
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REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + port*4, val);
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REG_WR(bp, NIG_REG_BMAC0_PAUSE_OUT_EN + port*4, val);
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REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0x0);
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REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0x0);
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@@ -580,14 +580,14 @@ void bnx2x_link_status_update(struct link_params *params,
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}
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}
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if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED)
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if (vars->link_status & LINK_STATUS_TX_FLOW_CONTROL_ENABLED)
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- vars->flow_ctrl |= FLOW_CTRL_TX;
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+ vars->flow_ctrl |= BNX2X_FLOW_CTRL_TX;
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else
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else
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- vars->flow_ctrl &= ~FLOW_CTRL_TX;
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+ vars->flow_ctrl &= ~BNX2X_FLOW_CTRL_TX;
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if (vars->link_status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED)
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if (vars->link_status & LINK_STATUS_RX_FLOW_CONTROL_ENABLED)
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- vars->flow_ctrl |= FLOW_CTRL_RX;
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+ vars->flow_ctrl |= BNX2X_FLOW_CTRL_RX;
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else
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else
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- vars->flow_ctrl &= ~FLOW_CTRL_RX;
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+ vars->flow_ctrl &= ~BNX2X_FLOW_CTRL_RX;
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if (vars->phy_flags & PHY_XGXS_FLAG) {
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if (vars->phy_flags & PHY_XGXS_FLAG) {
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if (vars->line_speed &&
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if (vars->line_speed &&
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@@ -618,7 +618,7 @@ void bnx2x_link_status_update(struct link_params *params,
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vars->line_speed = 0;
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vars->line_speed = 0;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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/* indicate no mac active */
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/* indicate no mac active */
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vars->mac_type = MAC_TYPE_NONE;
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vars->mac_type = MAC_TYPE_NONE;
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@@ -691,7 +691,7 @@ static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
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return -EINVAL;
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return -EINVAL;
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}
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}
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- if (flow_ctrl & FLOW_CTRL_RX ||
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+ if (flow_ctrl & BNX2X_FLOW_CTRL_RX ||
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line_speed == SPEED_10 ||
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line_speed == SPEED_10 ||
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line_speed == SPEED_100 ||
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line_speed == SPEED_100 ||
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line_speed == SPEED_1000 ||
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line_speed == SPEED_1000 ||
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@@ -1300,8 +1300,8 @@ static void bnx2x_calc_ieee_aneg_adv(struct link_params *params, u32 *ieee_fc)
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* Please refer to Table 28B-3 of the 802.3ab-1999 spec */
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* Please refer to Table 28B-3 of the 802.3ab-1999 spec */
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switch (params->req_flow_ctrl) {
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switch (params->req_flow_ctrl) {
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- case FLOW_CTRL_AUTO:
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- if (params->req_fc_auto_adv == FLOW_CTRL_BOTH) {
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+ case BNX2X_FLOW_CTRL_AUTO:
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+ if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH) {
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*ieee_fc |=
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*ieee_fc |=
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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} else {
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} else {
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@@ -1309,17 +1309,17 @@ static void bnx2x_calc_ieee_aneg_adv(struct link_params *params, u32 *ieee_fc)
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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}
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}
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break;
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break;
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- case FLOW_CTRL_TX:
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+ case BNX2X_FLOW_CTRL_TX:
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*ieee_fc |=
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*ieee_fc |=
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
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break;
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break;
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- case FLOW_CTRL_RX:
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- case FLOW_CTRL_BOTH:
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+ case BNX2X_FLOW_CTRL_RX:
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+ case BNX2X_FLOW_CTRL_BOTH:
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*ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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*ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
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break;
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break;
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- case FLOW_CTRL_NONE:
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+ case BNX2X_FLOW_CTRL_NONE:
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default:
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default:
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*ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
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*ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_NONE;
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break;
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break;
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@@ -1463,18 +1463,18 @@ static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
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{ /* LD LP */
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{ /* LD LP */
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switch (pause_result) { /* ASYM P ASYM P */
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switch (pause_result) { /* ASYM P ASYM P */
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case 0xb: /* 1 0 1 1 */
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case 0xb: /* 1 0 1 1 */
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- vars->flow_ctrl = FLOW_CTRL_TX;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_TX;
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break;
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break;
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case 0xe: /* 1 1 1 0 */
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case 0xe: /* 1 1 1 0 */
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- vars->flow_ctrl = FLOW_CTRL_RX;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
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break;
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break;
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case 0x5: /* 0 1 0 1 */
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case 0x5: /* 0 1 0 1 */
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case 0x7: /* 0 1 1 1 */
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case 0x7: /* 0 1 1 1 */
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case 0xd: /* 1 1 0 1 */
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case 0xd: /* 1 1 0 1 */
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case 0xf: /* 1 1 1 1 */
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case 0xf: /* 1 1 1 1 */
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- vars->flow_ctrl = FLOW_CTRL_BOTH;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH;
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break;
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break;
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default:
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default:
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@@ -1531,7 +1531,7 @@ static u8 bnx2x_ext_phy_resove_fc(struct link_params *params,
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DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x \n",
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DP(NETIF_MSG_LINK, "Ext PHY pause result 0x%x \n",
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pause_result);
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pause_result);
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bnx2x_pause_resolve(vars, pause_result);
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bnx2x_pause_resolve(vars, pause_result);
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- if (vars->flow_ctrl == FLOW_CTRL_NONE &&
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+ if (vars->flow_ctrl == BNX2X_FLOW_CTRL_NONE &&
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ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
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ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073) {
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bnx2x_cl45_read(bp, port,
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bnx2x_cl45_read(bp, port,
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ext_phy_type,
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ext_phy_type,
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@@ -1567,10 +1567,10 @@ static void bnx2x_flow_ctrl_resolve(struct link_params *params,
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u16 lp_pause; /* link partner */
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u16 lp_pause; /* link partner */
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u16 pause_result;
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u16 pause_result;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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/* resolve from gp_status in case of AN complete and not sgmii */
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/* resolve from gp_status in case of AN complete and not sgmii */
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- if ((params->req_flow_ctrl == FLOW_CTRL_AUTO) &&
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+ if ((params->req_flow_ctrl == BNX2X_FLOW_CTRL_AUTO) &&
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(gp_status & MDIO_AN_CL73_OR_37_COMPLETE) &&
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(gp_status & MDIO_AN_CL73_OR_37_COMPLETE) &&
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(!(vars->phy_flags & PHY_SGMII_FLAG)) &&
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(!(vars->phy_flags & PHY_SGMII_FLAG)) &&
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(XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
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(XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
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@@ -1591,11 +1591,11 @@ static void bnx2x_flow_ctrl_resolve(struct link_params *params,
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7;
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MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7;
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DP(NETIF_MSG_LINK, "pause_result 0x%x\n", pause_result);
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DP(NETIF_MSG_LINK, "pause_result 0x%x\n", pause_result);
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bnx2x_pause_resolve(vars, pause_result);
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bnx2x_pause_resolve(vars, pause_result);
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- } else if ((params->req_flow_ctrl == FLOW_CTRL_AUTO) &&
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+ } else if ((params->req_flow_ctrl == BNX2X_FLOW_CTRL_AUTO) &&
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(bnx2x_ext_phy_resove_fc(params, vars))) {
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(bnx2x_ext_phy_resove_fc(params, vars))) {
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return;
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return;
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} else {
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} else {
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- if (params->req_flow_ctrl == FLOW_CTRL_AUTO)
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+ if (params->req_flow_ctrl == BNX2X_FLOW_CTRL_AUTO)
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vars->flow_ctrl = params->req_fc_auto_adv;
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vars->flow_ctrl = params->req_fc_auto_adv;
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else
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else
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vars->flow_ctrl = params->req_flow_ctrl;
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vars->flow_ctrl = params->req_flow_ctrl;
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@@ -1728,11 +1728,11 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
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LINK_STATUS_PARALLEL_DETECTION_USED;
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LINK_STATUS_PARALLEL_DETECTION_USED;
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}
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}
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- if (vars->flow_ctrl & FLOW_CTRL_TX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_TX)
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vars->link_status |=
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vars->link_status |=
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LINK_STATUS_TX_FLOW_CONTROL_ENABLED;
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LINK_STATUS_TX_FLOW_CONTROL_ENABLED;
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- if (vars->flow_ctrl & FLOW_CTRL_RX)
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+ if (vars->flow_ctrl & BNX2X_FLOW_CTRL_RX)
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vars->link_status |=
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vars->link_status |=
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LINK_STATUS_RX_FLOW_CONTROL_ENABLED;
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LINK_STATUS_RX_FLOW_CONTROL_ENABLED;
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@@ -1742,7 +1742,7 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
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vars->phy_link_up = 0;
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vars->phy_link_up = 0;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->autoneg = AUTO_NEG_DISABLED;
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vars->autoneg = AUTO_NEG_DISABLED;
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vars->mac_type = MAC_TYPE_NONE;
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vars->mac_type = MAC_TYPE_NONE;
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}
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}
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@@ -3924,7 +3924,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 0;
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vars->link_up = 0;
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vars->line_speed = 0;
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vars->line_speed = 0;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->mac_type = MAC_TYPE_NONE;
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vars->mac_type = MAC_TYPE_NONE;
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if (params->switch_cfg == SWITCH_CFG_1G)
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if (params->switch_cfg == SWITCH_CFG_1G)
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@@ -3946,12 +3946,12 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 1;
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vars->link_up = 1;
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vars->line_speed = SPEED_10000;
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vars->line_speed = SPEED_10000;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
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vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
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/* enable on E1.5 FPGA */
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/* enable on E1.5 FPGA */
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if (CHIP_IS_E1H(bp)) {
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if (CHIP_IS_E1H(bp)) {
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vars->flow_ctrl |=
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vars->flow_ctrl |=
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- (FLOW_CTRL_TX | FLOW_CTRL_RX);
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+ (BNX2X_FLOW_CTRL_TX | BNX2X_FLOW_CTRL_RX);
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vars->link_status |=
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vars->link_status |=
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(LINK_STATUS_TX_FLOW_CONTROL_ENABLED |
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(LINK_STATUS_TX_FLOW_CONTROL_ENABLED |
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LINK_STATUS_RX_FLOW_CONTROL_ENABLED);
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LINK_STATUS_RX_FLOW_CONTROL_ENABLED);
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@@ -3974,7 +3974,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 1;
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vars->link_up = 1;
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vars->line_speed = SPEED_10000;
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vars->line_speed = SPEED_10000;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
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vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
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bnx2x_bmac_enable(params, vars, 0);
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bnx2x_bmac_enable(params, vars, 0);
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@@ -3994,7 +3994,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 1;
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vars->link_up = 1;
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vars->line_speed = SPEED_10000;
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vars->line_speed = SPEED_10000;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->mac_type = MAC_TYPE_BMAC;
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vars->mac_type = MAC_TYPE_BMAC;
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vars->phy_flags = PHY_XGXS_FLAG;
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vars->phy_flags = PHY_XGXS_FLAG;
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@@ -4009,7 +4009,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 1;
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vars->link_up = 1;
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vars->line_speed = SPEED_1000;
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vars->line_speed = SPEED_1000;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->mac_type = MAC_TYPE_EMAC;
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vars->mac_type = MAC_TYPE_EMAC;
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vars->phy_flags = PHY_XGXS_FLAG;
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vars->phy_flags = PHY_XGXS_FLAG;
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@@ -4026,7 +4026,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
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vars->link_up = 1;
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vars->link_up = 1;
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vars->line_speed = SPEED_10000;
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vars->line_speed = SPEED_10000;
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vars->duplex = DUPLEX_FULL;
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vars->duplex = DUPLEX_FULL;
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- vars->flow_ctrl = FLOW_CTRL_NONE;
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+ vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
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vars->phy_flags = PHY_XGXS_FLAG;
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vars->phy_flags = PHY_XGXS_FLAG;
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