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@@ -147,8 +147,8 @@ static void bfin_internal_mask_irq(unsigned int irq)
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unsigned mask_bank, mask_bit;
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mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
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mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
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- bfin_write_SIC_IMASK( mask_bank, bfin_read_SIC_IMASK(mask_bank) & \
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- ~(1 << mask_bit));
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+ bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &
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+ ~(1 << mask_bit));
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#endif
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SSYNC();
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}
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@@ -161,9 +161,9 @@ static void bfin_internal_unmask_irq(unsigned int irq)
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#else
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unsigned mask_bank, mask_bit;
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mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;
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- mask_bit = (irq - (IRQ_CORETMR + 1))%32;
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- bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) | \
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- ( 1 << mask_bit));
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+ mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;
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+ bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |
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+ (1 << mask_bit));
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#endif
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SSYNC();
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}
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@@ -728,7 +728,7 @@ int __init init_arch_irq(void)
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bfin_write_SIC_IMASK2(SIC_UNMASK_ALL);
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bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
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bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
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- bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
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+ bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
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#else
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bfin_write_SIC_IMASK(SIC_UNMASK_ALL);
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bfin_write_SIC_IWR(IWR_ENABLE_ALL);
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@@ -878,7 +878,6 @@ void do_irq(int vec, struct pt_regs *fp)
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sic_status[0] = bfin_read_SIC_ISR(0) & bfin_read_SIC_IMASK(0);
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sic_status[1] = bfin_read_SIC_ISR(1) & bfin_read_SIC_IMASK(1);
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sic_status[2] = bfin_read_SIC_ISR(2) & bfin_read_SIC_IMASK(2);
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-
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for (;; ivg++) {
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if (ivg >= ivg_stop) {
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