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@@ -87,6 +87,8 @@ static struct ioapic {
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struct IO_APIC_route_entry *saved_registers;
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/* I/O APIC config */
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struct mpc_ioapic mp_config;
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+ /* IO APIC gsi routing info */
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+ struct mp_ioapic_gsi gsi_config;
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} ioapics[MAX_IO_APICS];
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#define mpc_ioapic_ver(id) ioapics[id].mp_config.apicver
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@@ -101,10 +103,12 @@ unsigned int mpc_ioapic_addr(int id)
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return ioapics[id].mp_config.apicaddr;
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}
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-int nr_ioapics;
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+struct mp_ioapic_gsi *mp_ioapic_gsi_routing(int id)
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+{
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+ return &ioapics[id].gsi_config;
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+}
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-/* IO APIC gsi routing info */
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-struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
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+int nr_ioapics;
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/* The one past the highest gsi number used */
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u32 gsi_top;
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@@ -924,6 +928,7 @@ static int pin_2_irq(int idx, int apic, int pin)
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{
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int irq;
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int bus = mp_irqs[idx].srcbus;
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+ struct mp_ioapic_gsi *gsi_cfg = mp_ioapic_gsi_routing(apic);
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/*
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* Debugging check, we are in big trouble if this message pops up!
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@@ -934,7 +939,7 @@ static int pin_2_irq(int idx, int apic, int pin)
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if (test_bit(bus, mp_bus_not_pci)) {
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irq = mp_irqs[idx].srcbusirq;
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} else {
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- u32 gsi = mp_gsi_routing[apic].gsi_base + pin;
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+ u32 gsi = gsi_cfg->gsi_base + pin;
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if (gsi >= NR_IRQS_LEGACY)
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irq = gsi;
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@@ -3898,8 +3903,9 @@ int mp_find_ioapic(u32 gsi)
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/* Find the IOAPIC that manages this GSI. */
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for (i = 0; i < nr_ioapics; i++) {
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- if ((gsi >= mp_gsi_routing[i].gsi_base)
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- && (gsi <= mp_gsi_routing[i].gsi_end))
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+ struct mp_ioapic_gsi *gsi_cfg = mp_ioapic_gsi_routing(i);
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+ if ((gsi >= gsi_cfg->gsi_base)
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+ && (gsi <= gsi_cfg->gsi_end))
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return i;
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}
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@@ -3909,12 +3915,16 @@ int mp_find_ioapic(u32 gsi)
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int mp_find_ioapic_pin(int ioapic, u32 gsi)
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{
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+ struct mp_ioapic_gsi *gsi_cfg;
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+
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if (WARN_ON(ioapic == -1))
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return -1;
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- if (WARN_ON(gsi > mp_gsi_routing[ioapic].gsi_end))
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+
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+ gsi_cfg = mp_ioapic_gsi_routing(ioapic);
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+ if (WARN_ON(gsi > gsi_cfg->gsi_end))
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return -1;
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- return gsi - mp_gsi_routing[ioapic].gsi_base;
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+ return gsi - gsi_cfg->gsi_base;
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}
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static __init int bad_ioapic(unsigned long address)
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@@ -3936,6 +3946,7 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
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{
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int idx = 0;
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int entries;
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+ struct mp_ioapic_gsi *gsi_cfg;
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if (bad_ioapic(address))
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return;
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@@ -3955,21 +3966,22 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
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* and to prevent reprogramming of IOAPIC pins (PCI GSIs).
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*/
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entries = io_apic_get_redir_entries(idx);
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- mp_gsi_routing[idx].gsi_base = gsi_base;
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- mp_gsi_routing[idx].gsi_end = gsi_base + entries - 1;
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+ gsi_cfg = mp_ioapic_gsi_routing(idx);
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+ gsi_cfg->gsi_base = gsi_base;
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+ gsi_cfg->gsi_end = gsi_base + entries - 1;
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/*
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* The number of IO-APIC IRQ registers (== #pins):
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*/
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ioapics[idx].nr_registers = entries;
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- if (mp_gsi_routing[idx].gsi_end >= gsi_top)
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- gsi_top = mp_gsi_routing[idx].gsi_end + 1;
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+ if (gsi_cfg->gsi_end >= gsi_top)
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+ gsi_top = gsi_cfg->gsi_end + 1;
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printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, "
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"GSI %d-%d\n", idx, mpc_ioapic_id(idx),
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mpc_ioapic_ver(idx), mpc_ioapic_addr(idx),
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- mp_gsi_routing[idx].gsi_base, mp_gsi_routing[idx].gsi_end);
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+ gsi_cfg->gsi_base, gsi_cfg->gsi_end);
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nr_ioapics++;
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}
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