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@@ -149,6 +149,7 @@ struct clk_fixed_rate {
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u8 flags;
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};
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+extern const struct clk_ops clk_fixed_rate_ops;
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struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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unsigned long fixed_rate);
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@@ -180,6 +181,7 @@ struct clk_gate {
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#define CLK_GATE_SET_TO_DISABLE BIT(0)
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+extern const struct clk_ops clk_gate_ops;
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struct clk *clk_register_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx,
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@@ -218,6 +220,7 @@ struct clk_divider {
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#define CLK_DIVIDER_ONE_BASED BIT(0)
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#define CLK_DIVIDER_POWER_OF_TWO BIT(1)
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+extern const struct clk_ops clk_divider_ops;
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struct clk *clk_register_divider(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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@@ -252,6 +255,7 @@ struct clk_mux {
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#define CLK_MUX_INDEX_ONE BIT(0)
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#define CLK_MUX_INDEX_BIT BIT(1)
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+extern const struct clk_ops clk_mux_ops;
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struct clk *clk_register_mux(struct device *dev, const char *name,
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char **parent_names, u8 num_parents, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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