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@@ -111,7 +111,7 @@ struct vendor_data {
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struct pl08x_lli {
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u32 src;
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u32 dst;
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- u32 next;
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+ u32 lli;
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u32 cctl;
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};
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@@ -375,7 +375,7 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
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/*
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* A LLI pointer of 0 terminates the LLI list
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*/
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- clli = llis_va[i].next;
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+ clli = llis_va[i].lli;
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i++;
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}
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}
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@@ -577,7 +577,7 @@ static int pl08x_fill_lli_for_desc(struct pl08x_driver_data *pl08x,
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* memory. So we don't manipulate this bit currently.
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*/
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- llis_va[num_llis].next = llis_bus + (num_llis + 1) * sizeof(struct pl08x_lli);
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+ llis_va[num_llis].lli = llis_bus + (num_llis + 1) * sizeof(struct pl08x_lli);
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if (cctl & PL080_CONTROL_SRC_INCR)
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txd->srcbus.addr += len;
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@@ -925,7 +925,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
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/*
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* The final LLI terminates the LLI.
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*/
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- llis_va[num_llis - 1].next = 0;
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+ llis_va[num_llis - 1].lli = 0;
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/*
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* The final LLI element shall also fire an interrupt
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*/
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@@ -934,7 +934,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
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/* Now store the channel register values */
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txd->csrc = llis_va[0].src;
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txd->cdst = llis_va[0].dst;
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- txd->clli = llis_va[0].next;
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+ txd->clli = llis_va[0].lli;
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txd->cctl = llis_va[0].cctl;
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/* ccfg will be set at physical channel allocation time */
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@@ -950,7 +950,7 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
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llis_va[i].src,
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llis_va[i].dst,
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llis_va[i].cctl,
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- llis_va[i].next
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+ llis_va[i].lli
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);
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}
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}
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