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@@ -51,6 +51,19 @@ ENTRY(shmobile_secondary_vector_scu)
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2: .long shmobile_scu_base - PAGE_OFFSET + PLAT_PHYS_OFFSET
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ENDPROC(shmobile_secondary_vector_scu)
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+ENTRY(shmobile_boot_scu)
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+ @ r0 = SCU base address
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+ mrc p15, 0, r1, c0, c0, 5 @ read MIPDR
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+ and r1, r1, #3 @ mask out cpu ID
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+ lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits
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+ ldr r2, [r0, #8] @ SCU Power Status Register
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+ mov r3, #3
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+ bic r2, r2, r3, lsl r1 @ Clear bits of our CPU (Run Mode)
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+ str r2, [r0, #8] @ write back
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+
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+ b shmobile_invalidate_start
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+ENDPROC(shmobile_boot_scu)
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+
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.text
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.globl shmobile_scu_base
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shmobile_scu_base:
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