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@@ -785,10 +785,22 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
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}
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}
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+static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
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+{
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+ struct drm_device *dev = intel_hdmi_to_dev(hdmi);
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+
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+ if (IS_G4X(dev))
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+ return 165000;
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+ else if (IS_HASWELL(dev))
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+ return 300000;
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+ else
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+ return 225000;
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+}
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+
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static int intel_hdmi_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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- if (mode->clock > 165000)
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+ if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
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return MODE_CLOCK_HIGH;
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if (mode->clock < 20000)
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return MODE_CLOCK_LOW;
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@@ -806,6 +818,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
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struct drm_device *dev = encoder->base.dev;
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struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
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int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
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+ int portclock_limit = hdmi_portclock_limit(intel_hdmi);
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int desired_bpp;
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if (intel_hdmi->color_range_auto) {
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@@ -829,7 +842,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
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* outputs. We also need to check that the higher clock still fits
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* within limits.
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*/
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- if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000
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+ if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= portclock_limit
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&& HAS_PCH_SPLIT(dev)) {
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DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
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desired_bpp = 12*3;
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@@ -846,7 +859,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
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pipe_config->pipe_bpp = desired_bpp;
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}
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- if (adjusted_mode->clock > 225000) {
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+ if (adjusted_mode->clock > portclock_limit) {
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DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n");
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return false;
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}
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