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@@ -52,6 +52,7 @@ struct at91_adc_state {
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void __iomem *reg_base;
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struct at91_adc_reg_desc *registers;
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u8 startup_time;
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+ u8 sample_hold_time;
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bool sleep_mode;
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struct iio_trigger **trig;
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struct at91_adc_trigger *trigger_list;
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@@ -465,6 +466,9 @@ static int at91_adc_probe_dt(struct at91_adc_state *st,
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}
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st->startup_time = prop;
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+ prop = 0;
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+ of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
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+ st->sample_hold_time = prop;
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if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
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dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
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@@ -578,7 +582,7 @@ static const struct iio_info at91_adc_info = {
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static int at91_adc_probe(struct platform_device *pdev)
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{
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- unsigned int prsc, mstrclk, ticks, adc_clk;
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+ unsigned int prsc, mstrclk, ticks, adc_clk, shtim;
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int ret;
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struct iio_dev *idev;
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struct at91_adc_state *st;
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@@ -691,12 +695,21 @@ static int at91_adc_probe(struct platform_device *pdev)
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*/
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ticks = round_up((st->startup_time * adc_clk /
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1000000) - 1, 8) / 8;
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+ /*
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+ * a minimal Sample and Hold Time is necessary for the ADC to guarantee
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+ * the best converted final value between two channels selection
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+ * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
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+ */
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+ shtim = round_up((st->sample_hold_time * adc_clk /
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+ 1000000) - 1, 1);
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+
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reg = AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL;
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reg |= AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP;
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if (st->low_res)
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reg |= AT91_ADC_LOWRES;
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if (st->sleep_mode)
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reg |= AT91_ADC_SLEEP;
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+ reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
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at91_adc_writel(st, AT91_ADC_MR, reg);
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/* Setup the ADC channels available on the board */
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