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@@ -320,8 +320,7 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
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if (!shpc_poll_ctrl_busy(ctrl)) {
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/* After 1 sec and and the controller is still busy */
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- ctrl_err(ctrl, "%s : Controller is still busy after 1 sec.\n",
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- __func__);
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+ ctrl_err(ctrl, "Controller is still busy after 1 sec\n");
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retval = -EBUSY;
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goto out;
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}
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@@ -344,8 +343,9 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)
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cmd_status = hpc_check_cmd_status(slot->ctrl);
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if (cmd_status) {
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- ctrl_err(ctrl, "%s: Failed to issued command 0x%x "
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- "(error code = %d)\n", __func__, cmd, cmd_status);
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+ ctrl_err(ctrl,
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+ "Failed to issued command 0x%x (error code = %d)\n",
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+ cmd, cmd_status);
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retval = -EIO;
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}
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out:
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@@ -364,15 +364,15 @@ static int hpc_check_cmd_status(struct controller *ctrl)
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break;
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case 1:
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retval = SWITCH_OPEN;
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- ctrl_err(ctrl, "%s: Switch opened!\n", __func__);
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+ ctrl_err(ctrl, "Switch opened!\n");
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break;
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case 2:
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retval = INVALID_CMD;
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- ctrl_err(ctrl, "%s: Invalid HPC command!\n", __func__);
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+ ctrl_err(ctrl, "Invalid HPC command!\n");
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break;
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case 4:
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retval = INVALID_SPEED_MODE;
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- ctrl_err(ctrl, "%s: Invalid bus speed/mode!\n", __func__);
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+ ctrl_err(ctrl, "Invalid bus speed/mode!\n");
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break;
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default:
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retval = cmd_status;
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@@ -773,8 +773,8 @@ static irqreturn_t shpc_isr(int irq, void *dev_id)
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continue;
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slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
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- ctrl_dbg(ctrl, "%s: Slot %x with intr, slot register = %x\n",
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- __func__, hp_slot, slot_reg);
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+ ctrl_dbg(ctrl, "Slot %x with intr, slot register = %x\n",
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+ hp_slot, slot_reg);
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if (slot_reg & MRL_CHANGE_DETECTED)
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shpchp_handle_switch_change(hp_slot, ctrl);
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@@ -949,6 +949,7 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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u8 i;
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ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */
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+ ctrl_dbg(ctrl, "Hotplug Controller:\n");
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if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==
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PCI_DEVICE_ID_AMD_GOLAM_7450)) {
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@@ -958,38 +959,33 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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} else {
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ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC);
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if (!ctrl->cap_offset) {
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- ctrl_err(ctrl, "%s : cap_offset == 0\n", __func__);
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+ ctrl_err(ctrl, "Cannot find PCI capability\n");
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goto abort;
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}
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- ctrl_dbg(ctrl, "%s: cap_offset = %x\n", __func__,
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- ctrl->cap_offset);
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+ ctrl_dbg(ctrl, " cap_offset = %x\n", ctrl->cap_offset);
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rc = shpc_indirect_read(ctrl, 0, &shpc_base_offset);
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if (rc) {
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- ctrl_err(ctrl, "%s: cannot read base_offset\n",
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- __func__);
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+ ctrl_err(ctrl, "Cannot read base_offset\n");
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goto abort;
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}
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rc = shpc_indirect_read(ctrl, 3, &tempdword);
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if (rc) {
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- ctrl_err(ctrl, "%s: cannot read slot config\n",
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- __func__);
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+ ctrl_err(ctrl, "Cannot read slot config\n");
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goto abort;
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}
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num_slots = tempdword & SLOT_NUM;
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- ctrl_dbg(ctrl, "%s: num_slots (indirect) %x\n",
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- __func__, num_slots);
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+ ctrl_dbg(ctrl, " num_slots (indirect) %x\n", num_slots);
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for (i = 0; i < 9 + num_slots; i++) {
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rc = shpc_indirect_read(ctrl, i, &tempdword);
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if (rc) {
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- ctrl_err(ctrl, "%s: cannot read creg "
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- "(index = %d)\n", __func__, i);
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+ ctrl_err(ctrl,
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+ "Cannot read creg (index = %d)\n", i);
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goto abort;
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}
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- ctrl_dbg(ctrl, "%s: offset %d: value %x\n",
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- __func__, i, tempdword);
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+ ctrl_dbg(ctrl, " offset %d: value %x\n", i, tempdword);
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}
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ctrl->mmio_base =
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@@ -1003,25 +999,25 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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rc = pci_enable_device(pdev);
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if (rc) {
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- ctrl_err(ctrl, "%s: pci_enable_device failed\n", __func__);
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+ ctrl_err(ctrl, "pci_enable_device failed\n");
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goto abort;
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}
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if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {
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- ctrl_err(ctrl, "%s: cannot reserve MMIO region\n", __func__);
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+ ctrl_err(ctrl, "Cannot reserve MMIO region\n");
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rc = -1;
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goto abort;
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}
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ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);
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if (!ctrl->creg) {
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- ctrl_err(ctrl, "%s: cannot remap MMIO region %lx @ %lx\n",
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- __func__, ctrl->mmio_size, ctrl->mmio_base);
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+ ctrl_err(ctrl, "Cannot remap MMIO region %lx @ %lx\n",
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+ ctrl->mmio_size, ctrl->mmio_base);
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release_mem_region(ctrl->mmio_base, ctrl->mmio_size);
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rc = -1;
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goto abort;
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}
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- ctrl_dbg(ctrl, "%s: ctrl->creg %p\n", __func__, ctrl->creg);
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+ ctrl_dbg(ctrl, "ctrl->creg %p\n", ctrl->creg);
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mutex_init(&ctrl->crit_sect);
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mutex_init(&ctrl->cmd_lock);
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@@ -1040,21 +1036,21 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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/* Mask Global Interrupt Mask & Command Complete Interrupt Mask */
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tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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- ctrl_dbg(ctrl, "%s: SERR_INTR_ENABLE = %x\n", __func__, tempdword);
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+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
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tempdword |= (GLOBAL_INTR_MASK | GLOBAL_SERR_MASK |
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COMMAND_INTR_MASK | ARBITER_SERR_MASK);
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tempdword &= ~SERR_INTR_RSVDZ_MASK;
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shpc_writel(ctrl, SERR_INTR_ENABLE, tempdword);
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tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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- ctrl_dbg(ctrl, "%s: SERR_INTR_ENABLE = %x\n", __func__, tempdword);
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+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
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/* Mask the MRL sensor SERR Mask of individual slot in
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* Slot SERR-INT Mask & clear all the existing event if any
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*/
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for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
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slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
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- ctrl_dbg(ctrl, "%s: Default Logical Slot Register %d "
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- "value %x\n", __func__, hp_slot, slot_reg);
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+ ctrl_dbg(ctrl, "Default Logical Slot Register %d value %x\n",
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+ hp_slot, slot_reg);
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slot_reg |= (PRSNT_CHANGE_INTR_MASK | ISO_PFAULT_INTR_MASK |
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BUTTON_PRESS_INTR_MASK | MRL_CHANGE_INTR_MASK |
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CON_PFAULT_INTR_MASK | MRL_CHANGE_SERR_MASK |
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@@ -1079,8 +1075,8 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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rc = request_irq(ctrl->pci_dev->irq, shpc_isr, IRQF_SHARED,
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MY_NAME, (void *)ctrl);
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- ctrl_dbg(ctrl, "%s: request_irq %d for hpc%d (returns %d)\n",
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- __func__, ctrl->pci_dev->irq,
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+ ctrl_dbg(ctrl, "request_irq %d for hpc%d (returns %d)\n",
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+ ctrl->pci_dev->irq,
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atomic_read(&shpchp_num_controllers), rc);
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if (rc) {
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ctrl_err(ctrl, "Can't get irq %d for the hotplug "
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@@ -1088,9 +1084,7 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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goto abort_iounmap;
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}
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}
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- ctrl_dbg(ctrl, "%s: HPC at b:d:f:irq=0x%x:%x:%x:%x\n",
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- __func__, pdev->bus->number, PCI_SLOT(pdev->devfn),
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- PCI_FUNC(pdev->devfn), pdev->irq);
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+ ctrl_dbg(ctrl, "HPC at %s irq=%x\n", pci_name(pdev), pdev->irq);
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/*
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* If this is the first controller to be initialized,
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@@ -1109,8 +1103,8 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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*/
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for (hp_slot = 0; hp_slot < ctrl->num_slots; hp_slot++) {
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slot_reg = shpc_readl(ctrl, SLOT_REG(hp_slot));
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- ctrl_dbg(ctrl, "%s: Default Logical Slot Register %d "
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- "value %x\n", __func__, hp_slot, slot_reg);
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+ ctrl_dbg(ctrl, "Default Logical Slot Register %d value %x\n",
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+ hp_slot, slot_reg);
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slot_reg &= ~(PRSNT_CHANGE_INTR_MASK | ISO_PFAULT_INTR_MASK |
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BUTTON_PRESS_INTR_MASK | MRL_CHANGE_INTR_MASK |
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CON_PFAULT_INTR_MASK | SLOT_REG_RSVDZ_MASK);
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@@ -1123,8 +1117,7 @@ int shpc_init(struct controller *ctrl, struct pci_dev *pdev)
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SERR_INTR_RSVDZ_MASK);
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shpc_writel(ctrl, SERR_INTR_ENABLE, tempdword);
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tempdword = shpc_readl(ctrl, SERR_INTR_ENABLE);
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- ctrl_dbg(ctrl, "%s: SERR_INTR_ENABLE = %x\n",
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- __func__, tempdword);
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+ ctrl_dbg(ctrl, "SERR_INTR_ENABLE = %x\n", tempdword);
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}
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return 0;
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