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@@ -22,12 +22,15 @@
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#define MSR_TSC 0x10
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+#define MSR_AMD_HWCR 0xc0010015
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+
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enum mperf_id { C0 = 0, Cx, AVG_FREQ, MPERF_CSTATE_COUNT };
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static int mperf_get_count_percent(unsigned int self_id, double *percent,
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unsigned int cpu);
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static int mperf_get_count_freq(unsigned int id, unsigned long long *count,
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unsigned int cpu);
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+static struct timespec time_start, time_end;
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static cstate_t mperf_cstates[MPERF_CSTATE_COUNT] = {
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{
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@@ -54,19 +57,33 @@ static cstate_t mperf_cstates[MPERF_CSTATE_COUNT] = {
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},
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};
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+enum MAX_FREQ_MODE { MAX_FREQ_SYSFS, MAX_FREQ_TSC_REF };
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+static int max_freq_mode;
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+/*
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+ * The max frequency mperf is ticking at (in C0), either retrieved via:
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+ * 1) calculated after measurements if we know TSC ticks at mperf/P0 frequency
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+ * 2) cpufreq /sys/devices/.../cpu0/cpufreq/cpuinfo_max_freq at init time
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+ * 1. Is preferred as it also works without cpufreq subsystem (e.g. on Xen)
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+ */
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+static unsigned long max_frequency;
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+
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static unsigned long long tsc_at_measure_start;
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static unsigned long long tsc_at_measure_end;
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-static unsigned long max_frequency;
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static unsigned long long *mperf_previous_count;
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static unsigned long long *aperf_previous_count;
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static unsigned long long *mperf_current_count;
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static unsigned long long *aperf_current_count;
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+
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/* valid flag for all CPUs. If a MSR read failed it will be zero */
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static int *is_valid;
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static int mperf_get_tsc(unsigned long long *tsc)
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{
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- return read_msr(0, MSR_TSC, tsc);
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+ int ret;
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+ ret = read_msr(0, MSR_TSC, tsc);
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+ if (ret)
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+ dprint("Reading TSC MSR failed, returning %llu\n", *tsc);
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+ return ret;
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}
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static int mperf_init_stats(unsigned int cpu)
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@@ -97,36 +114,11 @@ static int mperf_measure_stats(unsigned int cpu)
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return 0;
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}
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-/*
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- * get_average_perf()
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- *
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- * Returns the average performance (also considers boosted frequencies)
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- *
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- * Input:
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- * aperf_diff: Difference of the aperf register over a time period
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- * mperf_diff: Difference of the mperf register over the same time period
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- * max_freq: Maximum frequency (P0)
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- *
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- * Returns:
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- * Average performance over the time period
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- */
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-static unsigned long get_average_perf(unsigned long long aperf_diff,
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- unsigned long long mperf_diff)
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-{
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- unsigned int perf_percent = 0;
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- if (((unsigned long)(-1) / 100) < aperf_diff) {
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- int shift_count = 7;
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- aperf_diff >>= shift_count;
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- mperf_diff >>= shift_count;
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- }
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- perf_percent = (aperf_diff * 100) / mperf_diff;
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- return (max_frequency * perf_percent) / 100;
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-}
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-
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static int mperf_get_count_percent(unsigned int id, double *percent,
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unsigned int cpu)
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{
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unsigned long long aperf_diff, mperf_diff, tsc_diff;
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+ unsigned long long timediff;
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if (!is_valid[cpu])
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return -1;
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@@ -136,11 +128,19 @@ static int mperf_get_count_percent(unsigned int id, double *percent,
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mperf_diff = mperf_current_count[cpu] - mperf_previous_count[cpu];
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aperf_diff = aperf_current_count[cpu] - aperf_previous_count[cpu];
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- tsc_diff = tsc_at_measure_end - tsc_at_measure_start;
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- *percent = 100.0 * mperf_diff / tsc_diff;
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- dprint("%s: mperf_diff: %llu, tsc_diff: %llu\n",
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- mperf_cstates[id].name, mperf_diff, tsc_diff);
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+ if (max_freq_mode == MAX_FREQ_TSC_REF) {
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+ tsc_diff = tsc_at_measure_end - tsc_at_measure_start;
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+ *percent = 100.0 * mperf_diff / tsc_diff;
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+ dprint("%s: TSC Ref - mperf_diff: %llu, tsc_diff: %llu\n",
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+ mperf_cstates[id].name, mperf_diff, tsc_diff);
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+ } else if (max_freq_mode == MAX_FREQ_SYSFS) {
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+ timediff = timespec_diff_us(time_start, time_end);
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+ *percent = 100.0 * mperf_diff / timediff;
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+ dprint("%s: MAXFREQ - mperf_diff: %llu, time_diff: %llu\n",
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+ mperf_cstates[id].name, mperf_diff, timediff);
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+ } else
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+ return -1;
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if (id == Cx)
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*percent = 100.0 - *percent;
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@@ -154,7 +154,7 @@ static int mperf_get_count_percent(unsigned int id, double *percent,
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static int mperf_get_count_freq(unsigned int id, unsigned long long *count,
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unsigned int cpu)
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{
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- unsigned long long aperf_diff, mperf_diff;
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+ unsigned long long aperf_diff, mperf_diff, time_diff, tsc_diff;
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if (id != AVG_FREQ)
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return 1;
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@@ -165,11 +165,21 @@ static int mperf_get_count_freq(unsigned int id, unsigned long long *count,
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mperf_diff = mperf_current_count[cpu] - mperf_previous_count[cpu];
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aperf_diff = aperf_current_count[cpu] - aperf_previous_count[cpu];
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- /* Return MHz for now, might want to return KHz if column width is more
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- generic */
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- *count = get_average_perf(aperf_diff, mperf_diff) / 1000;
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- dprint("%s: %llu\n", mperf_cstates[id].name, *count);
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+ if (max_freq_mode == MAX_FREQ_TSC_REF) {
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+ /* Calculate max_freq from TSC count */
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+ tsc_diff = tsc_at_measure_end - tsc_at_measure_start;
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+ time_diff = timespec_diff_us(time_start, time_end);
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+ max_frequency = tsc_diff / time_diff;
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+ }
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+ *count = max_frequency * ((double)aperf_diff / mperf_diff);
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+ dprint("%s: Average freq based on %s maximum frequency:\n",
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+ mperf_cstates[id].name,
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+ (max_freq_mode == MAX_FREQ_TSC_REF) ? "TSC calculated" : "sysfs read");
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+ dprint("%max_frequency: %lu", max_frequency);
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+ dprint("aperf_diff: %llu\n", aperf_diff);
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+ dprint("mperf_diff: %llu\n", mperf_diff);
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+ dprint("avg freq: %llu\n", *count);
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return 0;
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}
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@@ -178,6 +188,7 @@ static int mperf_start(void)
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int cpu;
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unsigned long long dbg;
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+ clock_gettime(CLOCK_REALTIME, &time_start);
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mperf_get_tsc(&tsc_at_measure_start);
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for (cpu = 0; cpu < cpu_count; cpu++)
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@@ -193,32 +204,104 @@ static int mperf_stop(void)
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unsigned long long dbg;
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int cpu;
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- mperf_get_tsc(&tsc_at_measure_end);
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-
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for (cpu = 0; cpu < cpu_count; cpu++)
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mperf_measure_stats(cpu);
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+ mperf_get_tsc(&tsc_at_measure_end);
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+ clock_gettime(CLOCK_REALTIME, &time_end);
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+
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mperf_get_tsc(&dbg);
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dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end);
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return 0;
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}
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-struct cpuidle_monitor mperf_monitor;
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-
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-struct cpuidle_monitor *mperf_register(void)
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+/*
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+ * Mperf register is defined to tick at P0 (maximum) frequency
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+ *
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+ * Instead of reading out P0 which can be tricky to read out from HW,
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+ * we use TSC counter if it reliably ticks at P0/mperf frequency.
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+ *
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+ * Still try to fall back to:
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+ * /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq
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+ * on older Intel HW without invariant TSC feature.
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+ * Or on AMD machines where TSC does not tick at P0 (do not exist yet, but
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+ * it's still double checked (MSR_AMD_HWCR)).
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+ *
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+ * On these machines the user would still get useful mperf
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+ * stats when acpi-cpufreq driver is loaded.
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+ */
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+static int init_maxfreq_mode(void)
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{
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+ int ret;
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+ unsigned long long hwcr;
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unsigned long min;
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- if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF))
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- return NULL;
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-
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- /* Assume min/max all the same on all cores */
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+ if (!cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC)
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+ goto use_sysfs;
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+
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+ if (cpupower_cpu_info.vendor == X86_VENDOR_AMD) {
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+ /* MSR_AMD_HWCR tells us whether TSC runs at P0/mperf
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+ * freq.
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+ * A test whether hwcr is accessable/available would be:
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+ * (cpupower_cpu_info.family > 0x10 ||
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+ * cpupower_cpu_info.family == 0x10 &&
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+ * cpupower_cpu_info.model >= 0x2))
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+ * This should be the case for all aperf/mperf
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+ * capable AMD machines and is therefore safe to test here.
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+ * Compare with Linus kernel git commit: acf01734b1747b1ec4
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+ */
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+ ret = read_msr(0, MSR_AMD_HWCR, &hwcr);
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+ /*
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+ * If the MSR read failed, assume a Xen system that did
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+ * not explicitly provide access to it and assume TSC works
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+ */
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+ if (ret != 0) {
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+ dprint("TSC read 0x%x failed - assume TSC working\n",
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+ MSR_AMD_HWCR);
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+ return 0;
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+ } else if (1 & (hwcr >> 24)) {
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+ max_freq_mode = MAX_FREQ_TSC_REF;
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+ return 0;
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+ } else { /* Use sysfs max frequency if available */ }
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+ } else if (cpupower_cpu_info.vendor == X86_VENDOR_INTEL) {
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+ /*
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+ * On Intel we assume mperf (in C0) is ticking at same
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+ * rate than TSC
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+ */
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+ max_freq_mode = MAX_FREQ_TSC_REF;
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+ return 0;
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+ }
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+use_sysfs:
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if (cpufreq_get_hardware_limits(0, &min, &max_frequency)) {
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dprint("Cannot retrieve max freq from cpufreq kernel "
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"subsystem\n");
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- return NULL;
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+ return -1;
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}
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+ max_freq_mode = MAX_FREQ_SYSFS;
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+ return 0;
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+}
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+
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+/*
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+ * This monitor provides:
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+ *
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+ * 1) Average frequency a CPU resided in
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+ * This always works if the CPU has aperf/mperf capabilities
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+ *
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+ * 2) C0 and Cx (any sleep state) time a CPU resided in
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+ * Works if mperf timer stops ticking in sleep states which
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+ * seem to be the case on all current HW.
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+ * Both is directly retrieved from HW registers and is independent
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+ * from kernel statistics.
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+ */
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+struct cpuidle_monitor mperf_monitor;
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+struct cpuidle_monitor *mperf_register(void)
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+{
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+ if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_APERF))
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+ return NULL;
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+
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+ if (init_maxfreq_mode())
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+ return NULL;
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/* Free this at program termination */
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is_valid = calloc(cpu_count, sizeof(int));
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Linus Torvalds