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@@ -48,10 +48,8 @@ struct ux500_dma_channel {
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struct ux500_dma_controller {
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struct dma_controller controller;
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- struct ux500_dma_channel rx_channel[UX500_MUSB_DMA_NUM_RX_CHANNELS];
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- struct ux500_dma_channel tx_channel[UX500_MUSB_DMA_NUM_TX_CHANNELS];
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- u32 num_rx_channels;
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- u32 num_tx_channels;
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+ struct ux500_dma_channel rx_channel[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS];
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+ struct ux500_dma_channel tx_channel[UX500_MUSB_DMA_NUM_RX_TX_CHANNELS];
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void *private_data;
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dma_addr_t phy_base;
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};
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@@ -144,19 +142,15 @@ static struct dma_channel *ux500_dma_channel_allocate(struct dma_controller *c,
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struct ux500_dma_channel *ux500_channel = NULL;
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struct musb *musb = controller->private_data;
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u8 ch_num = hw_ep->epnum - 1;
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- u32 max_ch;
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- /* Max 8 DMA channels (0 - 7). Each DMA channel can only be allocated
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+ /* 8 DMA channels (0 - 7). Each DMA channel can only be allocated
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* to specified hw_ep. For example DMA channel 0 can only be allocated
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* to hw_ep 1 and 9.
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*/
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if (ch_num > 7)
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ch_num -= 8;
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- max_ch = is_tx ? controller->num_tx_channels :
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- controller->num_rx_channels;
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-
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- if (ch_num >= max_ch)
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+ if (ch_num >= UX500_MUSB_DMA_NUM_RX_TX_CHANNELS)
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return NULL;
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ux500_channel = is_tx ? &(controller->tx_channel[ch_num]) :
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@@ -264,7 +258,7 @@ static int ux500_dma_controller_stop(struct dma_controller *c)
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struct dma_channel *channel;
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u8 ch_num;
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- for (ch_num = 0; ch_num < controller->num_rx_channels; ch_num++) {
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+ for (ch_num = 0; ch_num < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; ch_num++) {
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channel = &controller->rx_channel[ch_num].channel;
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ux500_channel = channel->private_data;
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@@ -274,7 +268,7 @@ static int ux500_dma_controller_stop(struct dma_controller *c)
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dma_release_channel(ux500_channel->dma_chan);
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}
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- for (ch_num = 0; ch_num < controller->num_tx_channels; ch_num++) {
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+ for (ch_num = 0; ch_num < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS; ch_num++) {
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channel = &controller->tx_channel[ch_num].channel;
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ux500_channel = channel->private_data;
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@@ -303,26 +297,21 @@ static int ux500_dma_controller_start(struct dma_controller *c)
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void **param_array;
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struct ux500_dma_channel *channel_array;
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- u32 ch_count;
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dma_cap_mask_t mask;
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- if ((data->num_rx_channels > UX500_MUSB_DMA_NUM_RX_CHANNELS) ||
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- (data->num_tx_channels > UX500_MUSB_DMA_NUM_TX_CHANNELS))
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- return -EINVAL;
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- controller->num_rx_channels = data->num_rx_channels;
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- controller->num_tx_channels = data->num_tx_channels;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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/* Prepare the loop for RX channels */
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channel_array = controller->rx_channel;
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- ch_count = data->num_rx_channels;
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param_array = data->dma_rx_param_array;
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for (dir = 0; dir < 2; dir++) {
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- for (ch_num = 0; ch_num < ch_count; ch_num++) {
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+ for (ch_num = 0;
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+ ch_num < UX500_MUSB_DMA_NUM_RX_TX_CHANNELS;
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+ ch_num++) {
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ux500_channel = &channel_array[ch_num];
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ux500_channel->controller = controller;
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ux500_channel->ch_num = ch_num;
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@@ -350,7 +339,6 @@ static int ux500_dma_controller_start(struct dma_controller *c)
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/* Prepare the loop for TX channels */
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channel_array = controller->tx_channel;
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- ch_count = data->num_tx_channels;
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param_array = data->dma_tx_param_array;
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is_tx = 1;
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}
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