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@@ -765,7 +765,7 @@ e1000_init_hw(struct e1000_hw *hw)
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}
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if (hw->mac_type == e1000_82573) {
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- e1000_enable_tx_pkt_filtering(hw);
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+ e1000_enable_tx_pkt_filtering(hw);
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}
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switch (hw->mac_type) {
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@@ -861,7 +861,7 @@ e1000_adjust_serdes_amplitude(struct e1000_hw *hw)
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if(eeprom_data != EEPROM_RESERVED_WORD) {
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/* Adjust SERDES output amplitude only. */
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- eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK;
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+ eeprom_data &= EEPROM_SERDES_AMPLITUDE_MASK;
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ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_EXT_CTRL, eeprom_data);
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if(ret_val)
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return ret_val;
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@@ -1228,7 +1228,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw)
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if (hw->phy_reset_disable)
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return E1000_SUCCESS;
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-
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+
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ret_val = e1000_phy_reset(hw);
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if (ret_val) {
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DEBUGOUT("Error Resetting the PHY\n");
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@@ -1370,7 +1370,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw)
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DEBUGFUNC("e1000_copper_link_ggp_setup");
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if(!hw->phy_reset_disable) {
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-
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+
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/* Enable CRS on TX for half-duplex operation. */
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ret_val = e1000_read_phy_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,
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&phy_data);
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@@ -1519,7 +1519,7 @@ e1000_copper_link_mgp_setup(struct e1000_hw *hw)
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if(hw->phy_reset_disable)
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return E1000_SUCCESS;
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-
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+
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/* Enable CRS on TX. This must be set for half-duplex operation. */
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ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
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if(ret_val)
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@@ -1665,7 +1665,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw)
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* collision distance in the Transmit Control Register.
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* 2) Set up flow control on the MAC to that established with
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* the link partner.
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-* 3) Config DSP to improve Gigabit link quality for some PHY revisions.
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+* 3) Config DSP to improve Gigabit link quality for some PHY revisions.
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*
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* hw - Struct containing variables accessed by shared code
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******************************************************************************/
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@@ -1674,7 +1674,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
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{
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int32_t ret_val;
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DEBUGFUNC("e1000_copper_link_postconfig");
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-
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+
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if(hw->mac_type >= e1000_82544) {
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e1000_config_collision_dist(hw);
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} else {
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@@ -1698,7 +1698,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw)
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return ret_val;
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}
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}
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-
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+
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return E1000_SUCCESS;
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}
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@@ -1754,11 +1754,11 @@ e1000_setup_copper_link(struct e1000_hw *hw)
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}
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if(hw->autoneg) {
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- /* Setup autoneg and flow control advertisement
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- * and perform autonegotiation */
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+ /* Setup autoneg and flow control advertisement
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+ * and perform autonegotiation */
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ret_val = e1000_copper_link_autoneg(hw);
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if(ret_val)
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- return ret_val;
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+ return ret_val;
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} else {
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/* PHY will be set to 10H, 10F, 100H,or 100F
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* depending on value from forced_speed_duplex. */
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@@ -1786,7 +1786,7 @@ e1000_setup_copper_link(struct e1000_hw *hw)
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ret_val = e1000_copper_link_postconfig(hw);
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if(ret_val)
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return ret_val;
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-
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+
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DEBUGOUT("Valid link established!!!\n");
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return E1000_SUCCESS;
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}
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@@ -1984,7 +1984,7 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
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DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
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- ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
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+ ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, mii_1000t_ctrl_reg);
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if(ret_val)
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return ret_val;
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@@ -2273,7 +2273,7 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
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DEBUGFUNC("e1000_config_mac_to_phy");
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- /* 82544 or newer MAC, Auto Speed Detection takes care of
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+ /* 82544 or newer MAC, Auto Speed Detection takes care of
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* MAC speed/duplex configuration.*/
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if (hw->mac_type >= e1000_82544)
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return E1000_SUCCESS;
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@@ -2292,9 +2292,9 @@ e1000_config_mac_to_phy(struct e1000_hw *hw)
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if(ret_val)
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return ret_val;
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- if(phy_data & M88E1000_PSSR_DPLX)
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+ if(phy_data & M88E1000_PSSR_DPLX)
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ctrl |= E1000_CTRL_FD;
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- else
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+ else
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ctrl &= ~E1000_CTRL_FD;
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e1000_config_collision_dist(hw);
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@@ -2493,10 +2493,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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*/
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if(hw->original_fc == e1000_fc_full) {
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hw->fc = e1000_fc_full;
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- DEBUGOUT("Flow Control = FULL.\r\n");
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+ DEBUGOUT("Flow Control = FULL.\n");
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} else {
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hw->fc = e1000_fc_rx_pause;
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- DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
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+ DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
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}
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}
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/* For receiving PAUSE frames ONLY.
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@@ -2512,7 +2512,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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hw->fc = e1000_fc_tx_pause;
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- DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
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+ DEBUGOUT("Flow Control = TX PAUSE frames only.\n");
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}
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/* For transmitting PAUSE frames ONLY.
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*
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@@ -2527,7 +2527,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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!(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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hw->fc = e1000_fc_rx_pause;
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- DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
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+ DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
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}
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/* Per the IEEE spec, at this point flow control should be
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* disabled. However, we want to consider that we could
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@@ -2553,10 +2553,10 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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hw->original_fc == e1000_fc_tx_pause) ||
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hw->fc_strict_ieee) {
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hw->fc = e1000_fc_none;
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- DEBUGOUT("Flow Control = NONE.\r\n");
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+ DEBUGOUT("Flow Control = NONE.\n");
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} else {
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hw->fc = e1000_fc_rx_pause;
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- DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
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+ DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
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}
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/* Now we need to do one last check... If we auto-
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@@ -2581,7 +2581,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
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return ret_val;
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}
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} else {
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- DEBUGOUT("Copper PHY and Auto Neg has not completed.\r\n");
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+ DEBUGOUT("Copper PHY and Auto Neg has not completed.\n");
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}
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}
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return E1000_SUCCESS;
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@@ -2764,7 +2764,7 @@ e1000_check_for_link(struct e1000_hw *hw)
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hw->autoneg_failed = 1;
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return 0;
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}
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- DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\r\n");
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+ DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
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/* Disable auto-negotiation in the TXCW register */
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E1000_WRITE_REG(hw, TXCW, (hw->txcw & ~E1000_TXCW_ANE));
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@@ -2789,7 +2789,7 @@ e1000_check_for_link(struct e1000_hw *hw)
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else if(((hw->media_type == e1000_media_type_fiber) ||
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(hw->media_type == e1000_media_type_internal_serdes)) &&
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(ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
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- DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\r\n");
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+ DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
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E1000_WRITE_REG(hw, TXCW, hw->txcw);
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E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU));
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@@ -2852,13 +2852,13 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
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if(status & E1000_STATUS_FD) {
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*duplex = FULL_DUPLEX;
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- DEBUGOUT("Full Duplex\r\n");
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+ DEBUGOUT("Full Duplex\n");
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} else {
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*duplex = HALF_DUPLEX;
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- DEBUGOUT(" Half Duplex\r\n");
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+ DEBUGOUT(" Half Duplex\n");
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}
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} else {
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- DEBUGOUT("1000 Mbs, Full Duplex\r\n");
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+ DEBUGOUT("1000 Mbs, Full Duplex\n");
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*speed = SPEED_1000;
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*duplex = FULL_DUPLEX;
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}
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@@ -2884,7 +2884,7 @@ e1000_get_speed_and_duplex(struct e1000_hw *hw,
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}
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}
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- if ((hw->mac_type == e1000_80003es2lan) &&
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+ if ((hw->mac_type == e1000_80003es2lan) &&
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(hw->media_type == e1000_media_type_copper)) {
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if (*speed == SPEED_1000)
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ret_val = e1000_configure_kmrn_for_1000(hw);
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@@ -3160,7 +3160,7 @@ e1000_read_phy_reg(struct e1000_hw *hw,
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if (e1000_swfw_sync_acquire(hw, swfw))
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return -E1000_ERR_SWFW_SYNC;
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- if((hw->phy_type == e1000_phy_igp ||
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+ if((hw->phy_type == e1000_phy_igp ||
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hw->phy_type == e1000_phy_igp_2) &&
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(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
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ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
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@@ -3299,7 +3299,7 @@ e1000_write_phy_reg(struct e1000_hw *hw,
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if (e1000_swfw_sync_acquire(hw, swfw))
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return -E1000_ERR_SWFW_SYNC;
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- if((hw->phy_type == e1000_phy_igp ||
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+ if((hw->phy_type == e1000_phy_igp ||
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hw->phy_type == e1000_phy_igp_2) &&
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(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
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ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
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@@ -3497,22 +3497,22 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
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}
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/* Read the device control register and assert the E1000_CTRL_PHY_RST
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* bit. Then, take it out of reset.
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- * For pre-e1000_82571 hardware, we delay for 10ms between the assert
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+ * For pre-e1000_82571 hardware, we delay for 10ms between the assert
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* and deassert. For e1000_82571 hardware and later, we instead delay
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* for 50us between and 10ms after the deassertion.
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*/
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ctrl = E1000_READ_REG(hw, CTRL);
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E1000_WRITE_REG(hw, CTRL, ctrl | E1000_CTRL_PHY_RST);
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E1000_WRITE_FLUSH(hw);
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-
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- if (hw->mac_type < e1000_82571)
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+
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+ if (hw->mac_type < e1000_82571)
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msec_delay(10);
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else
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udelay(100);
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-
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+
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E1000_WRITE_REG(hw, CTRL, ctrl);
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E1000_WRITE_FLUSH(hw);
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-
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+
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if (hw->mac_type >= e1000_82571)
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msec_delay(10);
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e1000_swfw_sync_release(hw, swfw);
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@@ -3816,7 +3816,7 @@ e1000_phy_m88_get_info(struct e1000_hw *hw,
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/* Check polarity status */
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ret_val = e1000_check_polarity(hw, &polarity);
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if(ret_val)
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- return ret_val;
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+ return ret_val;
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phy_info->cable_polarity = polarity;
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ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
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@@ -4541,14 +4541,14 @@ e1000_read_eeprom_eerd(struct e1000_hw *hw,
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E1000_WRITE_REG(hw, EERD, eerd);
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error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_READ);
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-
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+
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if(error) {
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break;
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}
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data[i] = (E1000_READ_REG(hw, EERD) >> E1000_EEPROM_RW_REG_DATA);
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-
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+
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}
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-
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+
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return error;
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}
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@@ -4574,24 +4574,24 @@ e1000_write_eeprom_eewr(struct e1000_hw *hw,
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return -E1000_ERR_SWFW_SYNC;
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for (i = 0; i < words; i++) {
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- register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
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- ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
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+ register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
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+ ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
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E1000_EEPROM_RW_REG_START;
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error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
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if(error) {
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break;
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- }
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+ }
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E1000_WRITE_REG(hw, EEWR, register_value);
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-
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+
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error = e1000_poll_eerd_eewr_done(hw, E1000_EEPROM_POLL_WRITE);
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-
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+
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if(error) {
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break;
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- }
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+ }
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}
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-
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+
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e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
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return error;
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}
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@@ -4611,7 +4611,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd)
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for(i = 0; i < attempts; i++) {
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if(eerd == E1000_EEPROM_POLL_READ)
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reg = E1000_READ_REG(hw, EERD);
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- else
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+ else
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reg = E1000_READ_REG(hw, EEWR);
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if(reg & E1000_EEPROM_RW_REG_DONE) {
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@@ -5136,7 +5136,7 @@ e1000_mc_addr_list_update(struct e1000_hw *hw,
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uint32_t i;
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uint32_t num_rar_entry;
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uint32_t num_mta_entry;
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-
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+
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DEBUGFUNC("e1000_mc_addr_list_update");
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/* Set the new number of MC addresses that we are being requested to use. */
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@@ -6241,7 +6241,7 @@ e1000_check_polarity(struct e1000_hw *hw,
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* 1 - Downshift ocured.
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*
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* returns: - E1000_ERR_XXX
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- * E1000_SUCCESS
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+ * E1000_SUCCESS
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*
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* For phy's older then IGP, this function reads the Downshift bit in the Phy
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* Specific Status register. For IGP phy's, it reads the Downgrade bit in the
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@@ -6256,7 +6256,7 @@ e1000_check_downshift(struct e1000_hw *hw)
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DEBUGFUNC("e1000_check_downshift");
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- if(hw->phy_type == e1000_phy_igp ||
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+ if(hw->phy_type == e1000_phy_igp ||
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hw->phy_type == e1000_phy_igp_2) {
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ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_LINK_HEALTH,
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&phy_data);
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@@ -6685,8 +6685,8 @@ e1000_set_d0_lplu_state(struct e1000_hw *hw,
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} else {
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-
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- phy_data |= IGP02E1000_PM_D0_LPLU;
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+
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+ phy_data |= IGP02E1000_PM_D0_LPLU;
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ret_val = e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
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if (ret_val)
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return ret_val;
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@@ -6778,7 +6778,7 @@ int32_t
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e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
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{
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uint8_t i;
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- uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
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+ uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
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uint8_t length = E1000_MNG_DHCP_COOKIE_LENGTH;
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length = (length >> 2);
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@@ -6797,7 +6797,7 @@ e1000_host_if_read_cookie(struct e1000_hw * hw, uint8_t *buffer)
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* and also checks whether the previous command is completed.
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* It busy waits in case of previous command is not completed.
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*
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- * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or
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+ * returns: - E1000_ERR_HOST_INTERFACE_COMMAND in case if is not ready or
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* timeout
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* - E1000_SUCCESS for success.
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|
|
****************************************************************************/
|
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@@ -6821,7 +6821,7 @@ e1000_mng_enable_host_if(struct e1000_hw * hw)
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|
msec_delay_irq(1);
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}
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|
|
|
|
|
- if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
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|
+ if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
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|
|
DEBUGOUT("Previous command timeout failed .\n");
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|
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return -E1000_ERR_HOST_INTERFACE_COMMAND;
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|
|
}
|