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+/*
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+ * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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+ */
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+
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+/*
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/clk.h>
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+#include <linux/delay.h>
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+#include <linux/gpio.h>
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+#include <linux/smsc911x.h>
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+
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+#include <mach/common.h>
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+#include <mach/hardware.h>
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+#include <mach/iomux-mx53.h>
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+
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/time.h>
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+
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+#include "crm_regs.h"
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+#include "devices-imx53.h"
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+
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+#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31)
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+
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+static iomux_v3_cfg_t mx53_ard_pads[] = {
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+ /* UART1 */
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+ MX53_PAD_PATA_DIOW__UART1_TXD_MUX,
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+ MX53_PAD_PATA_DMACK__UART1_RXD_MUX,
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+ /* WEIM for CS1 */
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+ MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */
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+ MX53_PAD_EIM_D16__EMI_WEIM_D_16,
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+ MX53_PAD_EIM_D17__EMI_WEIM_D_17,
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+ MX53_PAD_EIM_D18__EMI_WEIM_D_18,
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+ MX53_PAD_EIM_D19__EMI_WEIM_D_19,
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+ MX53_PAD_EIM_D20__EMI_WEIM_D_20,
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+ MX53_PAD_EIM_D21__EMI_WEIM_D_21,
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+ MX53_PAD_EIM_D22__EMI_WEIM_D_22,
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+ MX53_PAD_EIM_D23__EMI_WEIM_D_23,
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+ MX53_PAD_EIM_D24__EMI_WEIM_D_24,
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+ MX53_PAD_EIM_D25__EMI_WEIM_D_25,
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+ MX53_PAD_EIM_D26__EMI_WEIM_D_26,
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+ MX53_PAD_EIM_D27__EMI_WEIM_D_27,
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+ MX53_PAD_EIM_D28__EMI_WEIM_D_28,
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+ MX53_PAD_EIM_D29__EMI_WEIM_D_29,
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+ MX53_PAD_EIM_D30__EMI_WEIM_D_30,
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+ MX53_PAD_EIM_D31__EMI_WEIM_D_31,
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+ MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0,
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+ MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1,
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+ MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2,
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+ MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3,
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+ MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4,
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+ MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5,
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+ MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6,
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+ MX53_PAD_EIM_OE__EMI_WEIM_OE,
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+ MX53_PAD_EIM_RW__EMI_WEIM_RW,
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+ MX53_PAD_EIM_CS1__EMI_WEIM_CS_1,
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+};
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+
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+static struct resource ard_smsc911x_resources[] = {
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+ {
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+ .start = MX53_CS1_64MB_BASE_ADDR,
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+ .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = gpio_to_irq(ARD_ETHERNET_INT_B),
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+ .end = gpio_to_irq(ARD_ETHERNET_INT_B),
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+struct smsc911x_platform_config ard_smsc911x_config = {
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+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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+ .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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+ .flags = SMSC911X_USE_32BIT,
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+};
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+
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+static struct platform_device ard_smsc_lan9220_device = {
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+ .name = "smsc911x",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(ard_smsc911x_resources),
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+ .resource = ard_smsc911x_resources,
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+ .dev = {
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+ .platform_data = &ard_smsc911x_config,
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+ },
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+};
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+
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+static void __init mx53_ard_io_init(void)
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+{
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+ mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
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+ ARRAY_SIZE(mx53_ard_pads));
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+
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+ gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
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+ gpio_direction_input(ARD_ETHERNET_INT_B);
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+}
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+
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+ /* Config CS1 settings for ethernet controller */
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+static int weim_cs_config(void)
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+{
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+ u32 reg;
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+ void __iomem *weim_base, *iomuxc_base;
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+
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+ weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K);
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+ if (!weim_base)
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+ return -ENOMEM;
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+
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+ iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K);
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+ if (!iomuxc_base)
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+ return -ENOMEM;
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+
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+ /* CS1 timings for LAN9220 */
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+ writel(0x20001, (weim_base + 0x18));
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+ writel(0x0, (weim_base + 0x1C));
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+ writel(0x16000202, (weim_base + 0x20));
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+ writel(0x00000002, (weim_base + 0x24));
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+ writel(0x16002082, (weim_base + 0x28));
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+ writel(0x00000000, (weim_base + 0x2C));
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+ writel(0x00000000, (weim_base + 0x90));
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+
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+ /* specify 64 MB on CS1 and CS0 on GPR1 */
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+ reg = readl(iomuxc_base + 0x4);
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+ reg &= ~0x3F;
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+ reg |= 0x1B;
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+ writel(reg, (iomuxc_base + 0x4));
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+
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+ iounmap(iomuxc_base);
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+ iounmap(weim_base);
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+
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+ return 0;
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+}
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+
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+static struct platform_device *devices[] __initdata = {
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+ &ard_smsc_lan9220_device,
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+};
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+
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+static void __init mx53_ard_board_init(void)
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+{
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+ imx53_soc_init();
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+ imx53_add_imx_uart(0, NULL);
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+
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+ mx53_ard_io_init();
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+ weim_cs_config();
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+ platform_add_devices(devices, ARRAY_SIZE(devices));
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+}
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+
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+static void __init mx53_ard_timer_init(void)
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+{
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+ mx53_clocks_init(32768, 24000000, 22579200, 0);
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+}
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+
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+static struct sys_timer mx53_ard_timer = {
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+ .init = mx53_ard_timer_init,
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+};
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+
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+MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board")
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+ .map_io = mx53_map_io,
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+ .init_early = imx53_init_early,
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+ .init_irq = mx53_init_irq,
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+ .timer = &mx53_ard_timer,
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+ .init_machine = mx53_ard_board_init,
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+MACHINE_END
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