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@@ -251,9 +251,16 @@ static const struct serial8250_config uart_config[] = {
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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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.flags = UART_CAP_FIFO | UART_CAP_UUE,
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},
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+ [PORT_RM9000] = {
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+ .name = "RM9000",
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+ .fifo_size = 16,
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+ .tx_loadsz = 16,
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+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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+ .flags = UART_CAP_FIFO,
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+ },
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};
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined (CONFIG_SERIAL_8250_AU1X00)
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/* Au1x00 UART hardware has a weird register layout */
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static const u8 au_io_in_map[] = {
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@@ -289,6 +296,44 @@ static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
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return au_io_out_map[offset];
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}
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+#elif defined (CONFIG_SERIAL_8250_RM9K)
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+
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+static const u8
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+ regmap_in[8] = {
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+ [UART_RX] = 0x00,
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+ [UART_IER] = 0x0c,
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+ [UART_IIR] = 0x14,
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+ [UART_LCR] = 0x1c,
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+ [UART_MCR] = 0x20,
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+ [UART_LSR] = 0x24,
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+ [UART_MSR] = 0x28,
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+ [UART_SCR] = 0x2c
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+ },
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+ regmap_out[8] = {
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+ [UART_TX] = 0x04,
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+ [UART_IER] = 0x0c,
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+ [UART_FCR] = 0x18,
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+ [UART_LCR] = 0x1c,
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+ [UART_MCR] = 0x20,
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+ [UART_LSR] = 0x24,
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+ [UART_MSR] = 0x28,
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+ [UART_SCR] = 0x2c
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+ };
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+
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+static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
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+{
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+ if (up->port.iotype != UPIO_RM9000)
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+ return offset;
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+ return regmap_in[offset];
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+}
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+
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+static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
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+{
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+ if (up->port.iotype != UPIO_RM9000)
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+ return offset;
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+ return regmap_out[offset];
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+}
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+
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#else
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/* sane hardware needs no mapping */
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@@ -311,6 +356,7 @@ static unsigned int serial_in(struct uart_8250_port *up, int offset)
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case UPIO_DWAPB:
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return readb(up->port.membase + offset);
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+ case UPIO_RM9000:
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case UPIO_MEM32:
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return readl(up->port.membase + offset);
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@@ -348,6 +394,7 @@ serial_out(struct uart_8250_port *up, int offset, int value)
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writeb(value, up->port.membase + offset);
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break;
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+ case UPIO_RM9000:
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case UPIO_MEM32:
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writel(value, up->port.membase + offset);
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break;
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@@ -419,7 +466,7 @@ static inline void _serial_dl_write(struct uart_8250_port *up, int value)
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serial_outp(up, UART_DLM, value >> 8 & 0xff);
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}
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-#ifdef CONFIG_SERIAL_8250_AU1X00
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+#if defined (CONFIG_SERIAL_8250_AU1X00)
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/* Au1x00 haven't got a standard divisor latch */
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static int serial_dl_read(struct uart_8250_port *up)
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{
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@@ -436,6 +483,24 @@ static void serial_dl_write(struct uart_8250_port *up, int value)
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else
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_serial_dl_write(up, value);
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}
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+#elif defined (CONFIG_SERIAL_8250_RM9K)
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+static int serial_dl_read(struct uart_8250_port *up)
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+{
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+ return (up->port.iotype == UPIO_RM9000) ?
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+ (((__raw_readl(up->port.membase + 0x10) << 8) |
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+ (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
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+ _serial_dl_read(up);
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+}
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+
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+static void serial_dl_write(struct uart_8250_port *up, int value)
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+{
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+ if (up->port.iotype == UPIO_RM9000) {
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+ __raw_writel(value, up->port.membase + 0x08);
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+ __raw_writel(value >> 8, up->port.membase + 0x10);
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+ } else {
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+ _serial_dl_write(up, value);
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+ }
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+}
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#else
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#define serial_dl_read(up) _serial_dl_read(up)
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#define serial_dl_write(up, value) _serial_dl_write(up, value)
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@@ -637,7 +702,7 @@ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
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* its clones. (We treat the broken original StarTech 16650 V1 as a
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* 16550, and why not? Startech doesn't seem to even acknowledge its
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* existence.)
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- *
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+ *
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* What evil have men's minds wrought...
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*/
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static void autoconfig_has_efr(struct uart_8250_port *up)
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@@ -690,7 +755,7 @@ static void autoconfig_has_efr(struct uart_8250_port *up)
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up->bugs |= UART_BUG_QUOT;
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return;
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}
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-
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+
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/*
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* We check for a XR16C850 by setting DLL and DLM to 0, and then
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* reading back DLL and DLM. The chip type depends on the DLM
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@@ -833,7 +898,7 @@ static void autoconfig_16550a(struct uart_8250_port *up)
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status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
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status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
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serial_outp(up, 0x04, status1);
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-
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+
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serial_dl_write(up, quot);
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serial_outp(up, UART_LCR, 0);
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@@ -938,7 +1003,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
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/*
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* Do a simple existence test first; if we fail this,
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* there's no point trying anything else.
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- *
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+ *
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* 0x80 is used as a nonsense port to prevent against
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* false positives due to ISA bus float. The
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* assumption is that 0x80 is a non-existent port;
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@@ -977,7 +1042,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
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save_mcr = serial_in(up, UART_MCR);
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save_lcr = serial_in(up, UART_LCR);
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- /*
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+ /*
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* Check to see if a UART is really there. Certain broken
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* internal modems based on the Rockwell chipset fail this
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* test, because they apparently don't implement the loopback
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@@ -1084,7 +1149,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
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else
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serial_outp(up, UART_IER, 0);
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- out:
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+ out:
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spin_unlock_irqrestore(&up->port.lock, flags);
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// restore_flags(flags);
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DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
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@@ -1110,7 +1175,7 @@ static void autoconfig_irq(struct uart_8250_port *up)
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save_mcr = serial_inp(up, UART_MCR);
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save_ier = serial_inp(up, UART_IER);
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serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
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-
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+
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irqs = probe_irq_on();
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serial_outp(up, UART_MCR, 0);
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udelay (10);
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@@ -1175,8 +1240,11 @@ static void serial8250_start_tx(struct uart_port *port)
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if (up->bugs & UART_BUG_TXEN) {
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unsigned char lsr, iir;
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lsr = serial_in(up, UART_LSR);
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- iir = serial_in(up, UART_IIR);
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- if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)
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+ iir = serial_in(up, UART_IIR) & 0x0f;
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+ if ((up->port.type == PORT_RM9000) ?
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+ (lsr & UART_LSR_THRE &&
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+ (iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
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+ (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
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transmit_chars(up);
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}
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}
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@@ -1957,7 +2025,7 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
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/*
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* Ask the core to calculate the divisor for us.
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*/
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- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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+ baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = serial8250_get_divisor(port, baud);
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/*
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