|
@@ -18,7 +18,7 @@
|
|
|
#include <linux/init.h>
|
|
|
|
|
|
#include <linux/spinlock.h>
|
|
|
-#include <linux/sysdev.h>
|
|
|
+#include <linux/syscore_ops.h>
|
|
|
#include <linux/io.h>
|
|
|
#include <linux/gpio.h>
|
|
|
#include <linux/delay.h>
|
|
@@ -86,7 +86,6 @@ struct jz_gpio_chip {
|
|
|
spinlock_t lock;
|
|
|
|
|
|
struct gpio_chip gpio_chip;
|
|
|
- struct sys_device sysdev;
|
|
|
};
|
|
|
|
|
|
static struct jz_gpio_chip jz4740_gpio_chips[];
|
|
@@ -459,49 +458,47 @@ static struct jz_gpio_chip jz4740_gpio_chips[] = {
|
|
|
JZ4740_GPIO_CHIP(D),
|
|
|
};
|
|
|
|
|
|
-static inline struct jz_gpio_chip *sysdev_to_chip(struct sys_device *dev)
|
|
|
+static void jz4740_gpio_suspend_chip(struct jz_gpio_chip *chip)
|
|
|
{
|
|
|
- return container_of(dev, struct jz_gpio_chip, sysdev);
|
|
|
+ chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK);
|
|
|
+ writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET);
|
|
|
+ writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR);
|
|
|
}
|
|
|
|
|
|
-static int jz4740_gpio_suspend(struct sys_device *dev, pm_message_t state)
|
|
|
+static int jz4740_gpio_suspend(void)
|
|
|
{
|
|
|
- struct jz_gpio_chip *chip = sysdev_to_chip(dev);
|
|
|
+ int i;
|
|
|
|
|
|
- chip->suspend_mask = readl(chip->base + JZ_REG_GPIO_MASK);
|
|
|
- writel(~(chip->wakeup), chip->base + JZ_REG_GPIO_MASK_SET);
|
|
|
- writel(chip->wakeup, chip->base + JZ_REG_GPIO_MASK_CLEAR);
|
|
|
+ for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); i++)
|
|
|
+ jz4740_gpio_suspend_chip(&jz4740_gpio_chips[i]);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static int jz4740_gpio_resume(struct sys_device *dev)
|
|
|
+static void jz4740_gpio_resume_chip(struct jz_gpio_chip *chip)
|
|
|
{
|
|
|
- struct jz_gpio_chip *chip = sysdev_to_chip(dev);
|
|
|
uint32_t mask = chip->suspend_mask;
|
|
|
|
|
|
writel(~mask, chip->base + JZ_REG_GPIO_MASK_CLEAR);
|
|
|
writel(mask, chip->base + JZ_REG_GPIO_MASK_SET);
|
|
|
+}
|
|
|
|
|
|
- return 0;
|
|
|
+static void jz4740_gpio_resume(void)
|
|
|
+{
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for (i = ARRAY_SIZE(jz4740_gpio_chips) - 1; i >= 0 ; i--)
|
|
|
+ jz4740_gpio_resume_chip(&jz4740_gpio_chips[i]);
|
|
|
}
|
|
|
|
|
|
-static struct sysdev_class jz4740_gpio_sysdev_class = {
|
|
|
- .name = "gpio",
|
|
|
+static struct syscore_ops jz4740_gpio_syscore_ops = {
|
|
|
.suspend = jz4740_gpio_suspend,
|
|
|
.resume = jz4740_gpio_resume,
|
|
|
};
|
|
|
|
|
|
-static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
|
|
|
+static void jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
|
|
|
{
|
|
|
- int ret, irq;
|
|
|
-
|
|
|
- chip->sysdev.id = id;
|
|
|
- chip->sysdev.cls = &jz4740_gpio_sysdev_class;
|
|
|
- ret = sysdev_register(&chip->sysdev);
|
|
|
-
|
|
|
- if (ret)
|
|
|
- return ret;
|
|
|
+ int irq;
|
|
|
|
|
|
spin_lock_init(&chip->lock);
|
|
|
|
|
@@ -519,22 +516,17 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id)
|
|
|
irq_set_chip_and_handler(irq, &jz_gpio_irq_chip,
|
|
|
handle_level_irq);
|
|
|
}
|
|
|
-
|
|
|
- return 0;
|
|
|
}
|
|
|
|
|
|
static int __init jz4740_gpio_init(void)
|
|
|
{
|
|
|
unsigned int i;
|
|
|
- int ret;
|
|
|
-
|
|
|
- ret = sysdev_class_register(&jz4740_gpio_sysdev_class);
|
|
|
- if (ret)
|
|
|
- return ret;
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i)
|
|
|
jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i);
|
|
|
|
|
|
+ register_syscore_ops(&jz4740_gpio_syscore_ops);
|
|
|
+
|
|
|
printk(KERN_INFO "JZ4740 GPIO initialized\n");
|
|
|
|
|
|
return 0;
|