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@@ -1821,7 +1821,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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case CHIP_SUMO:
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rdev->config.evergreen.num_ses = 1;
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rdev->config.evergreen.max_pipes = 4;
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- rdev->config.evergreen.max_tile_pipes = 2;
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+ rdev->config.evergreen.max_tile_pipes = 4;
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if (rdev->pdev->device == 0x9648)
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rdev->config.evergreen.max_simds = 3;
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else if ((rdev->pdev->device == 0x9647) ||
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@@ -1844,7 +1844,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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rdev->config.evergreen.sc_prim_fifo_size = 0x40;
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rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30;
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rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130;
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- gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;
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+ gb_addr_config = SUMO_GB_ADDR_CONFIG_GOLDEN;
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break;
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case CHIP_SUMO2:
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rdev->config.evergreen.num_ses = 1;
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@@ -1866,7 +1866,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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rdev->config.evergreen.sc_prim_fifo_size = 0x40;
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rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30;
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rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130;
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- gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN;
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+ gb_addr_config = SUMO2_GB_ADDR_CONFIG_GOLDEN;
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break;
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case CHIP_BARTS:
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rdev->config.evergreen.num_ses = 2;
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@@ -1914,7 +1914,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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break;
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case CHIP_CAICOS:
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rdev->config.evergreen.num_ses = 1;
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- rdev->config.evergreen.max_pipes = 4;
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+ rdev->config.evergreen.max_pipes = 2;
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rdev->config.evergreen.max_tile_pipes = 2;
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rdev->config.evergreen.max_simds = 2;
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rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses;
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