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@@ -243,6 +243,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
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u32 usbcfg;
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u32 prtspd;
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u32 hcfg;
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+ u32 fslspclksel;
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u32 hfir;
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dev_vdbg(hsotg->dev, "%s(%p)\n", __func__, hsotg);
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@@ -274,6 +275,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
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}
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hcfg = readl(hsotg->regs + HCFG);
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+ fslspclksel = hcfg & HCFG_FSLSPCLKSEL_MASK;
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if (prtspd == HPRT0_SPD_LOW_SPEED &&
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params->host_ls_low_power_phy_clk ==
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@@ -281,8 +283,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
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/* 6 MHZ */
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dev_vdbg(hsotg->dev,
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"FS_PHY programming HCFG to 6 MHz\n");
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- if ((hcfg & HCFG_FSLSPCLKSEL_MASK) !=
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- HCFG_FSLSPCLKSEL_6_MHZ) {
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+ if (fslspclksel != HCFG_FSLSPCLKSEL_6_MHZ) {
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hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
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hcfg |= HCFG_FSLSPCLKSEL_6_MHZ;
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writel(hcfg, hsotg->regs + HCFG);
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@@ -292,8 +293,7 @@ static void dwc2_hprt0_enable(struct dwc2_hsotg *hsotg, u32 hprt0,
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/* 48 MHZ */
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dev_vdbg(hsotg->dev,
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"FS_PHY programming HCFG to 48 MHz\n");
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- if ((hcfg & HCFG_FSLSPCLKSEL_MASK) !=
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- HCFG_FSLSPCLKSEL_48_MHZ) {
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+ if (fslspclksel != HCFG_FSLSPCLKSEL_48_MHZ) {
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hcfg &= ~HCFG_FSLSPCLKSEL_MASK;
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hcfg |= HCFG_FSLSPCLKSEL_48_MHZ;
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writel(hcfg, hsotg->regs + HCFG);
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