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@@ -0,0 +1,522 @@
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+/*
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+ * Copyright (C) ST-Ericsson SA 2011
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+ *
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+ * Author: BIBEK BASU <bibek.basu@stericsson.com>
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+ * License terms: GNU General Public License (GPL) version 2
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+#include <linux/kernel.h>
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+#include <linux/types.h>
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+#include <linux/slab.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+#include <linux/err.h>
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+#include <linux/platform_device.h>
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+#include <linux/slab.h>
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+#include <linux/gpio.h>
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+#include <linux/irq.h>
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+#include <linux/interrupt.h>
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+#include <linux/mfd/ab8500.h>
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+#include <linux/mfd/abx500.h>
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+#include <linux/mfd/ab8500/gpio.h>
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+
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+/*
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+ * GPIO registers offset
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+ * Bank: 0x10
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+ */
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+#define AB8500_GPIO_SEL1_REG 0x00
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+#define AB8500_GPIO_SEL2_REG 0x01
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+#define AB8500_GPIO_SEL3_REG 0x02
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+#define AB8500_GPIO_SEL4_REG 0x03
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+#define AB8500_GPIO_SEL5_REG 0x04
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+#define AB8500_GPIO_SEL6_REG 0x05
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+
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+#define AB8500_GPIO_DIR1_REG 0x10
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+#define AB8500_GPIO_DIR2_REG 0x11
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+#define AB8500_GPIO_DIR3_REG 0x12
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+#define AB8500_GPIO_DIR4_REG 0x13
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+#define AB8500_GPIO_DIR5_REG 0x14
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+#define AB8500_GPIO_DIR6_REG 0x15
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+
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+#define AB8500_GPIO_OUT1_REG 0x20
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+#define AB8500_GPIO_OUT2_REG 0x21
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+#define AB8500_GPIO_OUT3_REG 0x22
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+#define AB8500_GPIO_OUT4_REG 0x23
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+#define AB8500_GPIO_OUT5_REG 0x24
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+#define AB8500_GPIO_OUT6_REG 0x25
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+
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+#define AB8500_GPIO_PUD1_REG 0x30
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+#define AB8500_GPIO_PUD2_REG 0x31
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+#define AB8500_GPIO_PUD3_REG 0x32
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+#define AB8500_GPIO_PUD4_REG 0x33
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+#define AB8500_GPIO_PUD5_REG 0x34
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+#define AB8500_GPIO_PUD6_REG 0x35
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+
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+#define AB8500_GPIO_IN1_REG 0x40
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+#define AB8500_GPIO_IN2_REG 0x41
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+#define AB8500_GPIO_IN3_REG 0x42
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+#define AB8500_GPIO_IN4_REG 0x43
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+#define AB8500_GPIO_IN5_REG 0x44
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+#define AB8500_GPIO_IN6_REG 0x45
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+#define AB8500_GPIO_ALTFUN_REG 0x45
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+#define ALTFUN_REG_INDEX 6
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+#define AB8500_NUM_GPIO 42
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+#define AB8500_NUM_VIR_GPIO_IRQ 16
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+
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+enum ab8500_gpio_action {
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+ NONE,
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+ STARTUP,
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+ SHUTDOWN,
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+ MASK,
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+ UNMASK
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+};
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+
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+struct ab8500_gpio {
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+ struct gpio_chip chip;
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+ struct ab8500 *parent;
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+ struct device *dev;
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+ struct mutex lock;
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+ u32 irq_base;
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+ enum ab8500_gpio_action irq_action;
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+ u16 rising;
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+ u16 falling;
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+};
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+/**
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+ * to_ab8500_gpio() - get the pointer to ab8500_gpio
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+ * @chip: Member of the structure ab8500_gpio
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+ */
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+static inline struct ab8500_gpio *to_ab8500_gpio(struct gpio_chip *chip)
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+{
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+ return container_of(chip, struct ab8500_gpio, chip);
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+}
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+
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+static int ab8500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
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+ unsigned offset, int val)
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+{
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+ struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
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+ u8 pos = offset % 8;
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+ int ret;
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+
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+ reg = reg + (offset / 8);
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+ ret = abx500_mask_and_set_register_interruptible(ab8500_gpio->dev,
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+ AB8500_MISC, reg, 1 << pos, val << pos);
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+ if (ret < 0)
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+ dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
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+ return ret;
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+}
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+/**
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+ * ab8500_gpio_get() - Get the particular GPIO value
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+ * @chip: Gpio device
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+ * @offset: GPIO number to read
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+ */
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+static int ab8500_gpio_get(struct gpio_chip *chip, unsigned offset)
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+{
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+ struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
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+ u8 mask = 1 << (offset % 8);
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+ u8 reg = AB8500_GPIO_OUT1_REG + (offset / 8);
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+ int ret;
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+ u8 data;
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+ ret = abx500_get_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
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+ reg, &data);
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+ if (ret < 0) {
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+ dev_err(ab8500_gpio->dev, "%s read failed\n", __func__);
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+ return ret;
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+ }
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+ return (data & mask) >> (offset % 8);
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+}
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+
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+static void ab8500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
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+{
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+ struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
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+ int ret;
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+ /* Write the data */
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+ ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, 1);
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+ if (ret < 0)
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+ dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
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+}
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+
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+static int ab8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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+ int val)
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+{
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+ int ret;
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+ /* set direction as output */
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+ ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
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+ if (ret < 0)
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+ return ret;
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+ /* disable pull down */
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+ ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
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+ if (ret < 0)
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+ return ret;
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+ /* set the output as 1 or 0 */
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+ return ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
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+
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+}
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+
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+static int ab8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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+{
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+ /* set the register as input */
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+ return ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
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+}
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+
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+static int ab8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
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+{
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+ /*
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+ * Only some GPIOs are interrupt capable, and they are
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+ * organized in discontiguous clusters:
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+ *
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+ * GPIO6 to GPIO13
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+ * GPIO24 and GPIO25
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+ * GPIO36 to GPIO41
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+ */
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+ static struct ab8500_gpio_irq_cluster {
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+ int start;
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+ int end;
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+ } clusters[] = {
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+ {.start = 6, .end = 13},
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+ {.start = 24, .end = 25},
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+ {.start = 36, .end = 41},
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+ };
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+ struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
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+ int base = ab8500_gpio->irq_base;
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(clusters); i++) {
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+ struct ab8500_gpio_irq_cluster *cluster = &clusters[i];
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+
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+ if (offset >= cluster->start && offset <= cluster->end)
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+ return base + offset - cluster->start;
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+
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+ /* Advance by the number of gpios in this cluster */
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+ base += cluster->end - cluster->start + 1;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static struct gpio_chip ab8500gpio_chip = {
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+ .label = "ab8500_gpio",
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+ .owner = THIS_MODULE,
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+ .direction_input = ab8500_gpio_direction_input,
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+ .get = ab8500_gpio_get,
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+ .direction_output = ab8500_gpio_direction_output,
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+ .set = ab8500_gpio_set,
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+ .to_irq = ab8500_gpio_to_irq,
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+};
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+
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+static unsigned int irq_to_rising(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ int offset = irq - ab8500_gpio->irq_base;
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+ int new_irq = offset + AB8500_INT_GPIO6R
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+ + ab8500_gpio->parent->irq_base;
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+ return new_irq;
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+}
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+
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+static unsigned int irq_to_falling(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ int offset = irq - ab8500_gpio->irq_base;
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+ int new_irq = offset + AB8500_INT_GPIO6F
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+ + ab8500_gpio->parent->irq_base;
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+ return new_irq;
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+
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+}
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+
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+static unsigned int rising_to_irq(unsigned int irq, void *dev)
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+{
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+ struct ab8500_gpio *ab8500_gpio = dev;
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+ int offset = irq - AB8500_INT_GPIO6R
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+ - ab8500_gpio->parent->irq_base ;
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+ int new_irq = offset + ab8500_gpio->irq_base;
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+ return new_irq;
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+}
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+
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+static unsigned int falling_to_irq(unsigned int irq, void *dev)
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+{
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+ struct ab8500_gpio *ab8500_gpio = dev;
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+ int offset = irq - AB8500_INT_GPIO6F
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+ - ab8500_gpio->parent->irq_base ;
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+ int new_irq = offset + ab8500_gpio->irq_base;
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+ return new_irq;
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+
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+}
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+
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+/*
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+ * IRQ handler
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+ */
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+
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+static irqreturn_t handle_rising(int irq, void *dev)
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+{
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+
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+ handle_nested_irq(rising_to_irq(irq , dev));
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+ return IRQ_HANDLED;
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+}
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+
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+static irqreturn_t handle_falling(int irq, void *dev)
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+{
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+
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+ handle_nested_irq(falling_to_irq(irq, dev));
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+ return IRQ_HANDLED;
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+}
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+
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+static void ab8500_gpio_irq_lock(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ mutex_lock(&ab8500_gpio->lock);
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+}
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+
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+static void ab8500_gpio_irq_sync_unlock(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ int offset = irq - ab8500_gpio->irq_base;
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+ bool rising = ab8500_gpio->rising & BIT(offset);
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+ bool falling = ab8500_gpio->falling & BIT(offset);
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+ int ret;
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+
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+ switch (ab8500_gpio->irq_action) {
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+ case STARTUP:
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+ if (rising)
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+ ret = request_threaded_irq(irq_to_rising(irq),
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+ NULL, handle_rising,
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+ IRQF_TRIGGER_RISING,
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+ "ab8500-gpio-r", ab8500_gpio);
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+ if (falling)
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+ ret = request_threaded_irq(irq_to_falling(irq),
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+ NULL, handle_falling,
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+ IRQF_TRIGGER_FALLING,
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+ "ab8500-gpio-f", ab8500_gpio);
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+ break;
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+ case SHUTDOWN:
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+ if (rising)
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+ free_irq(irq_to_rising(irq), ab8500_gpio);
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+ if (falling)
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+ free_irq(irq_to_falling(irq), ab8500_gpio);
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+ break;
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+ case MASK:
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+ if (rising)
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+ disable_irq(irq_to_rising(irq));
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+ if (falling)
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+ disable_irq(irq_to_falling(irq));
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+ break;
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+ case UNMASK:
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+ if (rising)
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+ enable_irq(irq_to_rising(irq));
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+ if (falling)
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+ enable_irq(irq_to_falling(irq));
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+ break;
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+ case NONE:
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+ break;
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+ }
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+ ab8500_gpio->irq_action = NONE;
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+ ab8500_gpio->rising &= ~(BIT(offset));
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+ ab8500_gpio->falling &= ~(BIT(offset));
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+ mutex_unlock(&ab8500_gpio->lock);
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+}
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+
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+
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+static void ab8500_gpio_irq_mask(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ ab8500_gpio->irq_action = MASK;
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+}
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+
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+static void ab8500_gpio_irq_unmask(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ ab8500_gpio->irq_action = UNMASK;
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+}
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+
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+static int ab8500_gpio_irq_set_type(unsigned int irq, unsigned int type)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ int offset = irq - ab8500_gpio->irq_base;
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+
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+ if (type == IRQ_TYPE_EDGE_BOTH) {
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+ ab8500_gpio->rising = BIT(offset);
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+ ab8500_gpio->falling = BIT(offset);
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+ } else if (type == IRQ_TYPE_EDGE_RISING) {
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+ ab8500_gpio->rising = BIT(offset);
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+ } else {
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+ ab8500_gpio->falling = BIT(offset);
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+ }
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+ return 0;
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+}
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+
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+unsigned int ab8500_gpio_irq_startup(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ ab8500_gpio->irq_action = STARTUP;
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+ return 0;
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+}
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+
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+void ab8500_gpio_irq_shutdown(unsigned int irq)
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+{
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+ struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
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+ ab8500_gpio->irq_action = SHUTDOWN;
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+}
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+
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+static struct irq_chip ab8500_gpio_irq_chip = {
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+ .name = "ab8500-gpio",
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+ .startup = ab8500_gpio_irq_startup,
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+ .shutdown = ab8500_gpio_irq_shutdown,
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+ .bus_lock = ab8500_gpio_irq_lock,
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+ .bus_sync_unlock = ab8500_gpio_irq_sync_unlock,
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+ .mask = ab8500_gpio_irq_mask,
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+ .unmask = ab8500_gpio_irq_unmask,
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+ .set_type = ab8500_gpio_irq_set_type,
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+};
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+
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+static int ab8500_gpio_irq_init(struct ab8500_gpio *ab8500_gpio)
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+{
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+ u32 base = ab8500_gpio->irq_base;
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+ int irq;
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+
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+ for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ ; irq++) {
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+ set_irq_chip_data(irq, ab8500_gpio);
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+ set_irq_chip_and_handler(irq, &ab8500_gpio_irq_chip,
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+ handle_simple_irq);
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+ set_irq_nested_thread(irq, 1);
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+#ifdef CONFIG_ARM
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+ set_irq_flags(irq, IRQF_VALID);
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+#else
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+ set_irq_noprobe(irq);
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+#endif
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+ }
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|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio)
|
|
|
+{
|
|
|
+ int base = ab8500_gpio->irq_base;
|
|
|
+ int irq;
|
|
|
+
|
|
|
+ for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ; irq++) {
|
|
|
+#ifdef CONFIG_ARM
|
|
|
+ set_irq_flags(irq, 0);
|
|
|
+#endif
|
|
|
+ set_irq_chip_and_handler(irq, NULL, NULL);
|
|
|
+ set_irq_chip_data(irq, NULL);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+static int __devinit ab8500_gpio_probe(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct ab8500_platform_data *ab8500_pdata =
|
|
|
+ dev_get_platdata(pdev->dev.parent);
|
|
|
+ struct ab8500_gpio_platform_data *pdata;
|
|
|
+ struct ab8500_gpio *ab8500_gpio;
|
|
|
+ int ret;
|
|
|
+ int i;
|
|
|
+
|
|
|
+ pdata = ab8500_pdata->gpio;
|
|
|
+ if (!pdata) {
|
|
|
+ dev_err(&pdev->dev, "gpio platform data missing\n");
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+
|
|
|
+ ab8500_gpio = kzalloc(sizeof(struct ab8500_gpio), GFP_KERNEL);
|
|
|
+ if (ab8500_gpio == NULL) {
|
|
|
+ dev_err(&pdev->dev, "failed to allocate memory\n");
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+ ab8500_gpio->dev = &pdev->dev;
|
|
|
+ ab8500_gpio->parent = dev_get_drvdata(pdev->dev.parent);
|
|
|
+ ab8500_gpio->chip = ab8500gpio_chip;
|
|
|
+ ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO;
|
|
|
+ ab8500_gpio->chip.dev = &pdev->dev;
|
|
|
+ ab8500_gpio->chip.base = pdata->gpio_base;
|
|
|
+ ab8500_gpio->irq_base = pdata->irq_base;
|
|
|
+ /* initialize the lock */
|
|
|
+ mutex_init(&ab8500_gpio->lock);
|
|
|
+ /*
|
|
|
+ * AB8500 core will handle and clear the IRQ
|
|
|
+ * configre GPIO based on config-reg value.
|
|
|
+ * These values are for selecting the PINs as
|
|
|
+ * GPIO or alternate function
|
|
|
+ */
|
|
|
+ for (i = AB8500_GPIO_SEL1_REG; i <= AB8500_GPIO_SEL6_REG; i++) {
|
|
|
+ ret = abx500_set_register_interruptible(ab8500_gpio->dev,
|
|
|
+ AB8500_MISC, i,
|
|
|
+ pdata->config_reg[i]);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out_free;
|
|
|
+ }
|
|
|
+ ret = abx500_set_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
|
|
|
+ AB8500_GPIO_ALTFUN_REG,
|
|
|
+ pdata->config_reg[ALTFUN_REG_INDEX]);
|
|
|
+ if (ret < 0)
|
|
|
+ goto out_free;
|
|
|
+
|
|
|
+ ret = ab8500_gpio_irq_init(ab8500_gpio);
|
|
|
+ if (ret)
|
|
|
+ goto out_free;
|
|
|
+ ret = gpiochip_add(&ab8500_gpio->chip);
|
|
|
+ if (ret) {
|
|
|
+ dev_err(&pdev->dev, "unable to add gpiochip: %d\n",
|
|
|
+ ret);
|
|
|
+ goto out_rem_irq;
|
|
|
+ }
|
|
|
+ platform_set_drvdata(pdev, ab8500_gpio);
|
|
|
+ return 0;
|
|
|
+
|
|
|
+out_rem_irq:
|
|
|
+ ab8500_gpio_irq_remove(ab8500_gpio);
|
|
|
+out_free:
|
|
|
+ mutex_destroy(&ab8500_gpio->lock);
|
|
|
+ kfree(ab8500_gpio);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * ab8500_gpio_remove() - remove Ab8500-gpio driver
|
|
|
+ * @pdev : Platform device registered
|
|
|
+ */
|
|
|
+static int __devexit ab8500_gpio_remove(struct platform_device *pdev)
|
|
|
+{
|
|
|
+ struct ab8500_gpio *ab8500_gpio = platform_get_drvdata(pdev);
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ ret = gpiochip_remove(&ab8500_gpio->chip);
|
|
|
+ if (ret < 0) {
|
|
|
+ dev_err(ab8500_gpio->dev, "unable to remove gpiochip:\
|
|
|
+ %d\n", ret);
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
|
+ mutex_destroy(&ab8500_gpio->lock);
|
|
|
+ kfree(ab8500_gpio);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static struct platform_driver ab8500_gpio_driver = {
|
|
|
+ .driver = {
|
|
|
+ .name = "ab8500-gpio",
|
|
|
+ .owner = THIS_MODULE,
|
|
|
+ },
|
|
|
+ .probe = ab8500_gpio_probe,
|
|
|
+ .remove = __devexit_p(ab8500_gpio_remove),
|
|
|
+};
|
|
|
+
|
|
|
+static int __init ab8500_gpio_init(void)
|
|
|
+{
|
|
|
+ return platform_driver_register(&ab8500_gpio_driver);
|
|
|
+}
|
|
|
+arch_initcall(ab8500_gpio_init);
|
|
|
+
|
|
|
+static void __exit ab8500_gpio_exit(void)
|
|
|
+{
|
|
|
+ platform_driver_unregister(&ab8500_gpio_driver);
|
|
|
+}
|
|
|
+module_exit(ab8500_gpio_exit);
|
|
|
+
|
|
|
+MODULE_AUTHOR("BIBEK BASU <bibek.basu@stericsson.com>");
|
|
|
+MODULE_DESCRIPTION("Driver allows to use AB8500 unused pins\
|
|
|
+ to be used as GPIO");
|
|
|
+MODULE_ALIAS("AB8500 GPIO driver");
|
|
|
+MODULE_LICENSE("GPL v2");
|
Linus Torvalds