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@@ -41,6 +41,15 @@
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#include <plat/tc.h>
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+/*
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+ * MAX_LOGICAL_DMA_CH_COUNT: the maximum number of logical DMA
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+ * channels that an instance of the SDMA IP block can support. Used
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+ * to size arrays. (The actual maximum on a particular SoC may be less
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+ * than this -- for example, OMAP1 SDMA instances only support 17 logical
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+ * DMA channels.)
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+ */
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+#define MAX_LOGICAL_DMA_CH_COUNT 32
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+
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#undef DEBUG
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#ifndef CONFIG_ARCH_OMAP1
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@@ -883,7 +892,7 @@ void omap_start_dma(int lch)
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if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
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int next_lch, cur_lch;
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- char dma_chan_link_map[dma_lch_count];
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+ char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
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dma_chan_link_map[lch] = 1;
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/* Set the link register of the first channel */
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@@ -967,7 +976,7 @@ void omap_stop_dma(int lch)
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if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
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int next_lch, cur_lch = lch;
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- char dma_chan_link_map[dma_lch_count];
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+ char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
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memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));
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do {
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